Prabir C. Maulik

According to our database1, Prabir C. Maulik authored at least 11 papers between 1987 and 2011.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

Legend:

Book 
In proceedings 
Article 
PhD thesis 
Dataset
Other 

Links

On csauthors.net:

Bibliography

2011
Frequency Tuning of Wide Temperature Range CMOS LC VCOs.
IEEE J. Solid State Circuits, 2011

2007
A DLL-Based Programmable Clock Multiplier in 0.18-µm CMOS With -70 dBc Reference Spur.
IEEE J. Solid State Circuits, 2007

2006
A 150MHz-400MHz DLL-Based Programmable Clock Multiplier with -7OdBc Reference Spur in 0.18um CMOS.
Proceedings of the IEEE 2006 Custom Integrated Circuits Conference, 2006

2002
A 12-bit integrated analog front end for broadband wireline networks.
IEEE J. Solid State Circuits, 2002

2000
A 16-bit 250-kHz delta-sigma modulator and decimation filter.
IEEE J. Solid State Circuits, 2000

1997
Comments on "FPAD: a fuzzy nonlinear programming approach to analog circuit design".
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 1997

1995
An analog/digital interface for cellular telephony.
IEEE J. Solid State Circuits, March, 1995

Integer programming based topology selection of cell-level analog circuits.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 1995

1992
A Mixed-Integer Nonlinear Programming Approach to Analog Circuit Synthesis.
Proceedings of the 29th Design Automation Conference, 1992

1991
Automating Analog Circuit Design using Constrained Optimization Techniques.
Proceedings of the 1991 IEEE/ACM International Conference on Computer-Aided Design, 1991

1987
Applications and Algorithm Partitioning on Warp.
Proceedings of the COMPCON'87, 1987


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