Prabhu Vellaisamy

According to our database, Prabhu Vellaisamy authored at least 7 papers between 2022 and 2024.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of four.

2024

TNNGen: Automated Design of Neuromorphic Sensory Processing Units for Time-Series Clustering.

Prabhu Vellaisamy, Harideep Nair, Vamsikrishna Ratnakaram, Dhruv Gupta, John Paul Shen

IEEE Trans. Circuits Syst. II Express Briefs, May, 2024

Realtime Person Identification via Gait Analysis.

Shanmuga Venkatachalam, Harideep Nair, Prabhu Vellaisamy, Yongqi Zhou, Ziad Youssfi, John Paul Shen

CoRR, 2024

OzMAC: An Energy-Efficient Sparsity-Exploiting Multiply-Accumulate-Unit Design for DL Inference.

Harideep Nair, Prabhu Vellaisamy, Tsung-Han Lin, Perry H. Wang, Ronald Shawn Blanton, John Paul Shen

CoRR, 2024

2023

tubGEMM: Energy-Efficient and Sparsity-Effective Temporal-Unary-Binary Based Matrix Multiply Unit.

Prabhu Vellaisamy, Harideep Nair, Joseph Finn, Manav Trivedi, Albert Chen, Anna Li, Tsung-Han Lin, Perry H. Wang, Ronald Shawn Blanton, John Paul Shen

Proceedings of the IEEE Computer Society Annual Symposium on VLSI, 2023

tuGEMM: Area-Power-Efficient Temporal Unary GEMM Architecture for Low-Precision Edge AI.

Harideep Nair, Prabhu Vellaisamy, Albert Chen, Joseph Finn, Anna Li, Manav Trivedi, John Paul Shen

Proceedings of the IEEE International Symposium on Circuits and Systems, 2023

2022

Towards a Design Framework for TNN-Based Neuromorphic Sensory Processing Units.

Prabhu Vellaisamy, John Paul Shen

CoRR, 2022

TNN7: A Custom Macro Suite for Implementing Highly Optimized Designs of Neuromorphic TNNs.

Harideep Nair, Prabhu Vellaisamy, Santha Bhasuthkar, John Paul Shen

Proceedings of the IEEE Computer Society Annual Symposium on VLSI, 2022