Pouya Houshmand

According to our database, Pouya Houshmand authored at least 13 papers between 2020 and 2024.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of four.

2024

Pack my weights and run! Minimizing overheads for in-memory computing accelerators.

Pouya Houshmand, Marian Verhelst

CoRR, 2024

High-Rate. Compact In-Sensor Denoising for Active Stereo Vision Towards Embedded Depth Sensing.

Pouya Houshmand, Jean-Sebastien Staelens, Ward van der Tempel, Marian Verhelst

Proceedings of the 22nd IEEE Interregional NEWCAS Conference, 2024

Enabling Efficient Hardware Acceleration of Hybrid Vision Transformer (ViT) Networks at the Edge.

Joren Dumoulin, Pouya Houshmand, Vikram Jain, Marian Verhelst

Proceedings of the IEEE International Symposium on Circuits and Systems, 2024

2023

DIANA: An End-to-End Hybrid DIgital and ANAlog Neural Network SoC for the Edge.

Pouya Houshmand, Giuseppe Maria Sarda, Vikram Jain, Kodai Ueyoshi, Ioannis A. Papistas, Man Shi, Qilin Zheng, Debjyoti Bhattacharjee, Arindam Mallik, Peter Debacker, Diederik Verkest, Marian Verhelst

IEEE J. Solid State Circuits, 2023

Benchmarking and modeling of analog and digital SRAM in-memory computing architectures.

Pouya Houshmand, Jiacong Sun, Marian Verhelst

CoRR, 2023

Stream: A Modeling Framework for Fine-grained Layer Fusion on Multi-core DNN Accelerators.

Arne Symons, Linyan Mei, Steven Colleman, Pouya Houshmand, Sebastian Karl, Marian Verhelst

Proceedings of the IEEE International Symposium on Performance Analysis of Systems and Software, 2023

Analog or Digital In-Memory Computing? Benchmarking Through Quantitative Modeling.

Jiacong Sun, Pouya Houshmand, Marian Verhelst

Proceedings of the IEEE/ACM International Conference on Computer Aided Design, 2023

A 16nm 128kB high-density fully digital In Memory Compute macro with reverse SRAM pre-charge achieving 0.36TOPs/mm², 256kB/mm² and 23. 8TOPs/W.

Weijie Jiang, Pouya Houshmand, Marian Verhelst, Wim Dehaene

Proceedings of the 49th IEEE European Solid State Circuits Conference, 2023

2022

Towards Heterogeneous Multi-core Accelerators Exploiting Fine-grained Scheduling of Layer-Fused Deep Neural Networks.

Arne Symons, Linyan Mei, Steven Colleman, Pouya Houshmand, Sebastian Karl, Marian Verhelst

CoRR, 2022

DIANA: An End-to-End Energy-Efficient Digital and ANAlog Hybrid Neural Network SoC.

Kodai Ueyoshi, Ioannis A. Papistas, Pouya Houshmand, Giuseppe Maria Sarda, Vikram Jain, Man Shi, Qilin Zheng, Juan Sebastian Piedrahita Giraldo, Peter Vrancx, Jonas Doevenspeck, Debjyoti Bhattacharjee, Stefan Cosemans, Arindam Mallik, Peter Debacker, Diederik Verkest, Marian Verhelst

Proceedings of the IEEE International Solid-State Circuits Conference, 2022

2021

ZigZag: Enlarging Joint Architecture-Mapping Design Space Exploration for DNN Accelerators.

Linyan Mei, Pouya Houshmand, Vikram Jain, Juan Sebastian Piedrahita Giraldo, Marian Verhelst

IEEE Trans. Computers, 2021

Hardware-Efficient Residual Neural Network Execution in Line-Buffer Depth-First Processing.

Man Shi, Pouya Houshmand, Linyan Mei, Marian Verhelst

IEEE J. Emerg. Sel. Topics Circuits Syst., 2021

2020

ZigZag: A Memory-Centric Rapid DNN Accelerator Design Space Exploration Framework.

Linyan Mei, Pouya Houshmand, Vikram Jain, Juan Sebastian Piedrahita Giraldo, Marian Verhelst

CoRR, 2020