Pooya Torkzadeh
Orcid: 0000-0003-1646-7054
According to our database1,
Pooya Torkzadeh
authored at least 19 papers
between 2005 and 2025.
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Bibliography
2025
Novel hybrid TFET-FinFET 12T SRAM cells with enhanced write margin and read performance.
Integr., 2025
2024
A Novel Design of 16-bit Multi-Mode 4-Channel Time-Interleaved Delta-Sigma Digital-to-Analog Converter.
J. Circuits Syst. Comput., September, 2024
2023
Int. J. Circuit Theory Appl., July, 2023
2022
Introducing scalable 1-bit full adders for designing quantum-dot cellular automata arithmetic circuits.
Frontiers Inf. Technol. Electron. Eng., 2022
An 8 bits, RF UHF-Band DAC based on interleaved bandpass delta sigma modulator assisted by background digital calibration.
Integr., 2022
2021
A 6-Bit 1.5-GS/s SAR ADC With Smart Speculative Two-Tap Embedded DFE in 130-nm CMOS for Wireline Receiver Applications.
IEEE Trans. Very Large Scale Integr. Syst., 2021
IEEE Access, 2021
2020
Fast-Transient-Response Low-Voltage Integrated, Interleaved DC-DC Converter for Implantable Devices.
J. Circuits Syst. Comput., 2020
An Ultra-Low-Power, 16 Bits CT Delta-Sigma Modulator Using 4-Bit Asynchronous SAR Quantizer for Medical Applications.
J. Circuits Syst. Comput., 2020
IET Image Process., 2020
2019
A fully linear 5.2 GHz - 5.8 GHz digitally controlled oscillator in 65-nm CMOS technology.
Microelectron. J., 2019
A novel design of hybrid-time-interleaved current steering digital to analog converter and its behavioral simulation considering non-ideal effects.
Integr., 2019
A study of analog decision feedback equalization for ADC-Based serial link receivers.
Integr., 2019
An accurate and power-efficient period-modulator-based interface for grounded capacitive sensors.
Int. J. Circuit Theory Appl., 2019
2018
Design trade-offs of a capacitance-to-voltage converter with a zoom-in technique for grounded capacitive sensors.
Int. J. Circuit Theory Appl., 2018
2010
Behavioral modeling of clock feed-through and channel charge injection non-ideal effects in SIMULINK for switched-capacitor integrator.
Simul. Model. Pract. Theory, 2010
2005
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2005), 2005
Analysis of jitter peaking and jitter accumulation in re-circulating delay-locked loops.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2005), 2005
Proceedings of the 2005 Conference on Asia South Pacific Design Automation, 2005