Poornima Mittal

Orcid: 0000-0002-9479-8628

According to our database1, Poornima Mittal authored at least 15 papers between 2011 and 2024.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of five.

Timeline

Legend:

Book 
In proceedings 
Article 
PhD thesis 
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Links

On csauthors.net:

Bibliography

2024
Performance Optimization of SAR ADC using Dynamic Controlled Comparator at 45 nm Technology for Biomedical and IoT Applications.
Wirel. Pers. Commun., January, 2024

2023
A Reconfigurable 7T SRAM Bit Cell for High Speed, Power Saving and Low Voltage Application.
ACM Trans. Design Autom. Electr. Syst., November, 2023

Modified Decoupled Sense Amplifier with Improved Sensing Speed for Low-Voltage Differential SRAM.
ACM Trans. Design Autom. Electr. Syst., November, 2023

Variation-Tolerant Sense Amplifier Using Decoupling Transistors for Enhanced SRAM Read Performance.
Circuits Syst. Signal Process., October, 2023

A Switching NMOS Based Single Ended Sense Amplifier for High Density SRAM Applications.
ACM Trans. Design Autom. Electr. Syst., 2023

2022
Tetra-variate scrutiny of diverse multiplexer techniques for designing a barrel shifter for low power digital circuits.
Microprocess. Microsystems, April, 2022

A Reliable and Temperature Variation Tolerant 7T SRAM Cell with Single Bitline Configuration for Low Voltage Application.
Circuits Syst. Signal Process., 2022

2021
Modeling and Analysis of High-Performance Triple Hole Block Layer Organic LED Based Light Sensor for Detection of Ovarian Cancer.
IEEE Trans. Circuits Syst. I Regul. Pap., 2021

Single bit line accessed high-performance ultra-low voltage operating 7T static random access memory cell with improved read stability.
Int. J. Circuit Theory Appl., 2021

2019
Analytical modelling and parameters extraction of multilayered OLED.
IET Circuits Devices Syst., 2019

2017
Performance Analysis of OLED with Hole Block Layer and Impact of Multiple Hole Block Layer.
Proceedings of the VLSI Design and Test - 21st International Symposium, 2017

2015
Performance Comparison Between InP-ON and SON MOSFET at Different Nanotechnology Nodes Using 2-D Numerical Device Simulation.
Proceedings of Fifth International Conference on Soft Computing for Problem Solving, 2015

2012
Channel length variation effect on performance parameters of organic field effect transistors.
Microelectron. J., 2012

Analysis of Top and Bottom Contact Organic Transistor Performance for Different Technology Nodes.
Proceedings of the International Symposium on Electronic System Design, 2012

2011
Top and Bottom Gate Polymeric Thin Film Transistor Analysis through Two Dimensional Numerical Device Simulation.
Proceedings of the International Conference on Soft Computing for Problem Solving (SocProS 2011) December 20-22, 2011, 2011


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