Pooria M. Yaghini
Orcid: 0000-0002-0352-0197
According to our database1,
Pooria M. Yaghini
authored at least 21 papers
between 2009 and 2022.
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Bibliography
2022
IEEE Trans. Emerg. Top. Comput., 2022
2021
Proceedings of the 29th Euromicro International Conference on Parallel, 2021
2019
Proceedings of the 37th IEEE International Conference on Computer Design, 2019
2018
IEEE Trans. Computers, 2018
2017
IEEE Trans. Computers, 2017
2016
IEEE Trans. Computers, 2016
ADVOCAT: Automated deadlock verification for on-chip cache coherence and interconnects.
Proceedings of the 2016 Design, Automation & Test in Europe Conference & Exhibition, 2016
2015
IEEE Trans. Very Large Scale Integr. Syst., 2015
IEEE Trans. Computers, 2015
ACM J. Emerg. Technol. Comput. Syst., 2015
Integr., 2015
Proceedings of the 33rd IEEE VLSI Test Symposium, 2015
Proceedings of the 9th International Symposium on Networks-on-Chip, 2015
2014
Proceedings of the 2nd International Workshop on Many-core Embedded Systems, 2014
Proceedings of the 2014 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems, 2014
2011
Investigation of transient fault effects in synchronous and asynchronous Network on Chip router.
J. Syst. Archit., 2011
2010
Test Documentation Tools and CBR Reduce the Cost of Testing.
Proceedings of the 2010 International Conference on Software Engineering Research & Practice, 2010
Proceedings of the 18th Euromicro Conference on Parallel, 2010
2009
Proceedings of the 10th Latin American Test Workshop, 2009
Proceedings of the 15th IEEE International On-Line Testing Symposium (IOLTS 2009), 2009