Poona Bahrebar
According to our database1,
Poona Bahrebar
authored at least 22 papers
between 2010 and 2021.
Collaborative distances:
Collaborative distances:
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Bibliography
2021
Proceedings of the CF '21: Computing Frontiers Conference, 2021
2020
Proceedings of the SLIP '20: System-Level Interconnect, 2020
2018
SIGBED Rev., 2018
Microprocess. Microsystems, 2018
3D MAX: A Maximally Adaptive Routing Method for VC-less 3D Mesh-based Networks-on-Chip.
Proceedings of the 11th International Workshop on Network on Chip Architectures, 2018
2017
Adaptive and reconfigurable bubble routing technique for 2D Torus interconnection networks.
Proceedings of the 12th International Symposium on Reconfigurable Communication-centric Systems-on-Chip, 2017
Proceedings of the 26th International Conference on Computer Communication and Networks, 2017
A NoC-based custom FPGA configuration memory architecture for ultra-fast micro-reconfiguration.
Proceedings of the International Conference on Field Programmable Technology, 2017
2016
Proceedings of the 11th International Symposium on Reconfigurable Communication-centric Systems-on-Chip, 2016
2015
The Hamiltonian-based odd-even turn model for maximally adaptive routing in 2D mesh networks-on-chip.
Comput. Electr. Eng., 2015
Proceedings of the International Conference on ReConFigurable Computing and FPGAs, 2015
Proceedings of the 8th International Workshop on Network on Chip Architectures, 2015
Hamiltonian Path Strategy for Deadlock-Free and Adaptive Routing in Diametrical 2D Mesh NoCs.
Proceedings of the 15th IEEE/ACM International Symposium on Cluster, 2015
2014
Proceedings of the 27th IEEE International System-on-Chip Conference, 2014
Proceedings of the 2014 International Conference on ReConFigurable Computing and FPGAs, 2014
Characterizing Traffic Locality in 3D NoC-Based CMPs Using a Path-Based Partitioning Method.
Proceedings of the 22nd IEEE Annual Symposium on High-Performance Interconnects, 2014
Improving hamiltonian-based routing methods for on-chip networks: A turn model approach.
Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2014
2013
The Hamiltonian-based odd-even turn model for adaptive routing in interconnection networks.
Proceedings of the 2012 International Conference on Reconfigurable Computing and FPGAs, 2013
Proceedings of the 21st Euromicro International Conference on Parallel, 2013
Towards balanced traffic distribution in NoCs using a highly adaptive path-based routing algorithm.
Proceedings of the International Conference on High Performance Computing & Simulation, 2013
2010
Simple Exact Algorithm for Transistor Sizing of Low-Power High-Speed Arithmetic Circuits.
VLSI Design, 2010