Pohsiang Hsu

According to our database1, Pohsiang Hsu authored at least 7 papers between 1997 and 2001.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of five.

Timeline

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Links

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Bibliography

2001
A low bit-rate video codec based on two-dimensional mesh motion compensation with adaptive interpolation.
IEEE Trans. Circuits Syst. Video Technol., 2001

Software Optimization of Video Codecs on Pentium Processor with MMX Technology.
EURASIP J. Adv. Signal Process., 2001

2000
Software Optimization of H.263 Video Encoder on Pentium Processor with MMX Technology.
Proceedings of the 2000 IEEE International Conference on Multimedia and Expo, 2000

A Predictive H.263 Bit-Rate Control Scheme based on Scene Information.
Proceedings of the 2000 IEEE International Conference on Multimedia and Expo, 2000

1999
VLSI architecture and design for high performance adaptive video scaling.
Proceedings of the 1999 International Symposium on Circuits and Systems, ISCAS 1999, Orlando, Florida, USA, May 30, 1999

1997
2-D mesh motion compensation with adaptive interpolation.
Proceedings of the First IEEE Workshop on Multimedia Signal Processing, 1997

An adaptive interpolation scheme for 2-D mesh motion compensation.
Proceedings of the Proceedings 1997 International Conference on Image Processing, 1997


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