Po-Yung Chang

According to our database1, Po-Yung Chang authored at least 9 papers between 1994 and 1998.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

Legend:

Book 
In proceedings 
Article 
PhD thesis 
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Links

On csauthors.net:

Bibliography

1998
Increasing the Instruction Fetch Rate via Block-Structured Instruction Set Architectures.
Int. J. Parallel Program., 1998

1997
Classification-directed branch predictor design.
PhD thesis, 1997

Improving branch prediction accuracy by reducing pattern history table interference.
Int. J. Parallel Program., 1997

Target Prediction for Indirect Jumps.
Proceedings of the 24th International Symposium on Computer Architecture, 1997

1996
Branch Classification: New Mechanism for Improving Branch Predictor Performance.
Int. J. Parallel Program., 1996

Using Predicated Execution to Improve the Performance of a Dynamically Scheduled Machine with Speculative Execution.
Int. J. Parallel Program., 1996

Using Hybrid Branch Predictors to Improve Branch Prediction Accuracy in the Presence of Context Switches.
Proceedings of the 23rd Annual International Symposium on Computer Architecture, 1996

1995
Alternative implementations of hybrid branch predictors.
Proceedings of the 28th Annual International Symposium on Microarchitecture, Ann Arbor, Michigan, USA, November 29, 1995

1994
The effect of speculatively updating branch history on branch prediction accuracy, revisited.
Proceedings of the 27th Annual International Symposium on Microarchitecture, San Jose, California, USA, November 30, 1994


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