Po-Yu Yeh

According to our database¹, Po-Yu Yeh authored at least 3 papers between 2009 and 2010.

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2010

Effective design-for-testability techniques for H.264 all-binary integer motion estimation.

[BibT_eX]

[DOI]

IET Circuits Devices Syst., 2010

2009

Design-for-testability techniques for CORDIC design.

[BibT_eX]

[DOI]

Microelectron. J., 2009

Scalable and bijective cells for C-testable iterative logic array architectures.

[BibT_eX]

[DOI]

IET Circuits Devices Syst., 2009