Po-Kai Hsu

Orcid: 0000-0002-7518-9472

According to our database1, Po-Kai Hsu authored at least 9 papers between 2017 and 2024.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

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Bibliography

2024
A Heterogeneous Platform for 3D NAND-Based In-Memory Hyperdimensional Computing Engine for Genome Sequencing Applications.
IEEE Trans. Circuits Syst. I Regul. Pap., April, 2024

Accelerator Design using 3D Stacked Capacitorless DRAM for Large Language Models.
Proceedings of the 6th IEEE International Conference on AI Circuits and Systems, 2024

2023
Proxima: Near-storage Acceleration for Graph-based Approximate Nearest Neighbor Search in 3D NAND.
CoRR, 2023

An In-Storage Processing Architecture with 3D NAND Heterogeneous Integration for Spectra Open Modification Search.
Proceedings of the International Symposium on Memory Systems, 2023

2022
In-Memory 3D NAND Flash Hyperdimensional Computing Engine for Energy-Efficient SARS-CoV-2 Genome Sequencing.
Proceedings of the IEEE International Memory Workshop, 2022

2021
Design of Computing-in-Memory (CIM) with Vertical Split-Gate Flash Memory for Deep Neural Network (DNN) Inference Accelerator.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2021

2020
Real-time topological localization using structured-view ConvNet with expectation rules and training renewal.
Robotics Auton. Syst., 2020

Introduction of Non-Volatile Computing In Memory (nvCIM) by 3D NAND Flash for Inference Accelerator of Deep Neural Network (DNN) and the Read Disturb Reliability Evaluation : (Invited Paper).
Proceedings of the 2020 IEEE International Reliability Physics Symposium, 2020

2017
The VLSI Architecture of a Highly Efficient Deblocking Filter for HEVC Systems.
IEEE Trans. Circuits Syst. Video Technol., 2017


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