Po-Jung Sung

According to our database1, Po-Jung Sung authored at least 2 papers between 2020 and 2024.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of four.

Timeline

2020
2021
2022
2023
2024
0
1
2
1
1

Legend:

Book 
In proceedings 
Article 
PhD thesis 
Dataset
Other 

Links

On csauthors.net:

Bibliography

2024
Bit-Cost-Scalable 3D DRAM Architecture and Unit Cell First Demonstrated with Integrated Gate-Around and Channel-Around IGZO FETs.
Proceedings of the IEEE Symposium on VLSI Technology and Circuits 2024, 2024

2020
Tri-Gate Ferroelectric FET Characterization and Modelling for Online Training of Neural Networks at Room Temperature and 233K.
Proceedings of the 2020 Device Research Conference, 2020


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