Po-Hsun Wu

According to our database, Po-Hsun Wu authored at least 18 papers between 2011 and 2022.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of four.

2022

Robust H_∞ Observer-Based Reference Tracking Control Design of Nonlinear Stochastic Systems: HJIE-Embedded Deep Learning Approach.

Bor-Sen Chen, Po-Hsun Wu

IEEE Access, 2022

2021

Robust H_∞ Deep Neural Network-Based Filter Design of Nonlinear Stochastic Signal Systems.

Bor-Sen Chen, Po-Hsun Wu, Min-Yen Lee

IEEE Access, 2021

2019

Auto-focus pathology microscope using sub-array sampling.

Po-Hsun Wu, Chun-Jen Weng, Pi-Ying Cheng

Proceedings of the IEEE International Instrumentation and Measurement Technology Conference, 2019

2016

Parasitic-Aware Common-Centroid FinFET Placement and Routing for Current-Ratio Matching.

Po-Hsun Wu, Mark Po-Hung Lin, Xin Li, Tsung-Yi Ho

ACM Trans. Design Autom. Electr. Syst., 2016

2015

A Novel Analog Physical Synthesis Methodology Integrating Existent Design Expertise.

Po-Hsun Wu, Mark Po-Hung Lin, Tung-Chieh Chen, Ching-Feng Yeh, Xin Li, Tsung-Yi Ho

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2015

Common-Centroid FinFET Placement Considering the Impact of Gate Misalignment.

Po-Hsun Wu, Mark Po-Hung Lin, Xin Li, Tsung-Yi Ho

Proceedings of the 2015 Symposium on International Symposium on Physical Design, ISPD 2015, Monterey, CA, USA, March 29, 2015

Analog layout synthesis with knowledge mining.

Po-Hsun Wu, Mark Po-Hung Lin, Tsung-Yi Ho

Proceedings of the European Conference on Circuit Theory and Design, 2015

2014

Exploring Feasibilities of Symmetry Islands and Monotonic Current Paths in Slicing Trees for Analog Placement.

Po-Hsun Wu, Mark Po-Hung Lin, Tung-Chieh Chen, Ching-Feng Yeh, Tsung-Yi Ho, Bin-Da Liu

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2014

Placement optimization of flexible TFT circuits with mechanical strain and temperature consideration.

Jiun-Li Lin, Po-Hsun Wu, Tsung-Yi Ho

ACM J. Emerg. Technol. Comput. Syst., 2014

Triangle-based process hotspot classification with dummification in EUVL.

Po-Hsun Wu, Che-Wen Chen, Chi-Ruo Wu, Tsung-Yi Ho

Proceedings of the Technical Papers of 2014 International Symposium on VLSI Design, 2014

A topology-based ECO routing methodology for mask cost minimization.

Po-Hsun Wu, Shang-Ya Bai, Tsung-Yi Ho

Proceedings of the 19th Asia and South Pacific Design Automation Conference, 2014

2013

1-D Cell Generation With Printability Enhancement.

Po-Hsun Wu, Mark Po-Hung Lin, Tung-Chieh Chen, Tsung-Yi Ho, Yu-Chuan Chen, Shun-Ren Siao, Shu-Hung Lin

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2013

Bus-driven floorplanning with thermal consideration.

Po-Hsun Wu, Tsung-Yi Ho

Integr., 2013

Lithography-aware 1-dimensional cell generation.

Po-Hsun Wu, Mark Po-Hung Lin, Tung-Chieh Chen, Tsung-Yi Ho, Yu-Chuan Chen

Proceedings of the 21st European Conference on Circuit Theory and Design, 2013

A novel cell placement algorithm for flexible TFT circuit with mechanical strain and temperature consideration.

Jiun-Li Lin, Po-Hsun Wu, Tsung-Yi Ho

Proceedings of the 18th Asia and South Pacific Design Automation Conference, 2013

2012

Bus-driven floorplanning with bus pin assignment and deviation minimization.

Po-Hsun Wu, Tsung-Yi Ho

Integr., 2012

Performance-driven analog placement considering monotonic current paths.

Po-Hsun Wu, Mark Po-Hung Lin, Yang-Ru Chen, Bing-Shiun Chou, Tung-Chieh Chen, Tsung-Yi Ho, Bin-Da Liu

Proceedings of the 2012 IEEE/ACM International Conference on Computer-Aided Design, 2012

2011

Thermal-aware bus-driven floorplanning.

Po-Hsun Wu, Tsung-Yi Ho

Proceedings of the 2011 International Symposium on Low Power Electronics and Design, 2011