Po-Hsiang Lan
According to our database1,
Po-Hsiang Lan
authored at least 8 papers
between 2008 and 2016.
Collaborative distances:
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Bibliography
2016
IEICE Trans. Electron., 2016
2015
A 1 V Input, 3 V-to-6 V Output, 58%-Efficient Integrated Charge Pump With a Hybrid Topology for Area Reduction and an Improved Efficiency by Using Parasitics.
IEEE J. Solid State Circuits, 2015
2013
A High-Efficiency, Wide Workload Range, Digital Off-Time Modulation (DOTM) DC-DC Converter With Asynchronous Power Saving Technique.
IEEE Trans. Very Large Scale Integr. Syst., 2013
2012
A High Efficiency FLL-Assisted Current-Controlled DC-DC Converter Over Light-Loaded Range.
IEEE Trans. Circuits Syst. I Regul. Pap., 2012
An area-efficient CMOS switching converter with on-chip LC filter using feedforward ripple cancellation technique.
Proceedings of Technical Program of 2012 VLSI Design, Automation and Test, 2012
2011
An asynchronous digitally-controlled switching converter with adaptive resolution and dynamic power saving to achieve higher than 93.5% efficiency between 5mA and 250mA load.
Proceedings of the IEEE Asian Solid-State Circuits Conference, 2011
2010
Proceedings of the IEEE Asia Pacific Conference on Circuits and Systems, 2010
2008
A 1-V CMOS Pseudo-Differential Amplifier With Multiple Common-Mode Stabilization and Frequency Compensation Loops.
IEEE Trans. Circuits Syst. II Express Briefs, 2008