Po-Cheng Pan

According to our database, Po-Cheng Pan authored at least 14 papers between 2009 and 2024.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of four.

2024

Efficient Analog Layout Generation for In-RRAM Computing Circuits via Area and Wire Optimization.

Bo-Han Li, Kuan-Chih Lin, Hao Zuo, Po-Cheng Pan, Hung-Ming Chen, Shyh-Jye Jou, Chien-Nan Jimmy Liu, Bo-Cheng Lai

Proceedings of the 67th IEEE International Midwest Symposium on Circuits and Systems, 2024

2020

Exploring Multiple Analog Placements With Partial-Monotonic Current Paths and Symmetry Constraints Using PCP-SP.

Abhishek Patyal, Po-Cheng Pan, K. A. Asha, Hung-Ming Chen, Wei-Zen Chen

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2020

2019

An Efficient Learning-based Approach for Performance Exploration on Analog and RF Circuit Synthesis.

Po-Cheng Pan, Chien-Chia Huang, Hung-Ming Chen

Proceedings of the 56th Annual Design Automation Conference 2019, 2019

2018

On Closing the Gap Between Pre-Simulation and Post-Simulation Results in Nanometer Analog Layouts.

Po-Cheng Pan, Hung-Wen Huang, Chien-Chia Huang, Abhishek Patyal, Hung-Ming Chen, Tsun-Yu Yang

Proceedings of the 15th International Conference on Synthesis, 2018

Analog placement with current flow and symmetry constraints using PCP-SP.

Abhishek Patyal, Po-Cheng Pan, K. A. Asha, Hung-Ming Chen, Hao-Yu Chi, Chien-Nan Liu

Proceedings of the 55th Annual Design Automation Conference, 2018

2015

A Fast Prototyping Framework for Analog Layout Migration With Planar Preservation.

Po-Cheng Pan, Ching-Yu Chin, Hung-Ming Chen, Tung-Chieh Chen, Chin-Chieh Lee, Jou-Chun Lin

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2015

R2P: Recomposition and Retargeting of Photographic Images.

Hui-Tang Chang, Po-Cheng Pan, Yu-Chiang Frank Wang, Ming-Syan Chen

Proceedings of the 23rd Annual ACM Conference on Multimedia Conference, MM '15, Brisbane, Australia, October 26, 2015

2014

An automatic synthesis tool for nanometer low dropout regulator using simulation based model and geometric programming.

Shih-Hsin Hsu, Wei-Zen Chen, Jui-Pin Zheng, Sean S.-Y. Liu, Po-Cheng Pan, Hung-Ming Chen

Proceedings of the Technical Papers of 2014 International Symposium on VLSI Design, 2014

2013

Efficient analog layout prototyping by layout reuse with routing preservation.

Ching-Yu Chin, Po-Cheng Pan, Hung-Ming Chen, Tung-Chieh Chen, Jou-Chun Lin

Proceedings of the IEEE/ACM International Conference on Computer-Aided Design, 2013

PAGE: parallel agile genetic exploration towards utmost performance for analog circuit design.

Po-Cheng Pan, Hung-Ming Chen, Chien-Chih Lin

Proceedings of the Design, Automation and Test in Europe, 2013

2012

Configurable analog routing methodology via technology and design constraint unification.

Po-Cheng Pan, Hung-Ming Chen, Yi-Kan Cheng, Jill Liu, Wei-Yi Hu

Proceedings of the 2012 IEEE/ACM International Conference on Computer-Aided Design, 2012

2011

Integrated hierarchical synthesis of analog/RF circuits with accurate performance mapping.

Kuo-Hsuan Meng, Po-Cheng Pan, Hung-Ming Chen

Proceedings of the 12th International Symposium on Quality Electronic Design, 2011

Fast analog layout prototyping for nanometer design migration.

Yi-Peng Weng, Hung-Ming Chen, Tung-Chieh Chen, Po-Cheng Pan, Chien-Hung Chen, Wei-Zen Chen

Proceedings of the 2011 IEEE/ACM International Conference on Computer-Aided Design, 2011

2009

A stochastic-based efficient critical area extractor on OpenAccess platform.

Bo-Zhou Chen, Hung-Ming Chen, Li-Da Huang, Po-Cheng Pan

Proceedings of the 19th ACM Great Lakes Symposium on VLSI 2009, 2009