Piotr Maj

Orcid: 0000-0002-1059-6376

According to our database1, Piotr Maj authored at least 21 papers between 2006 and 2024.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

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Bibliography

2024
Automated and Holistic Co-design of Neural Networks and ASICs for Enabling In-Pixel Intelligence.
CoRR, 2024

2023
Single Photon Counting Readout IC With 44 e<sup>-</sup> rms ENC and 5.5 e<sup>-</sup> rms Offset Spread With Charge Sensitive Amplifier Active Feedback Discharge.
IEEE Trans. Circuits Syst. I Regul. Pap., May, 2023

Self-Adaptation of Line Driver Pre-Emphasis Parameters via Embedded Line Loss Sensing.
Proceedings of the 18th Conference on Ph.D Research in Microelectronics and Electronics, 2023

2022
Design and Challenges of Edge Computing ASICs on Front-End Electronics.
Proceedings of the 23rd International Symposium on Quality Electronic Design, 2022

2019
SPC Pixel IC with 9.4 e<sup>-</sup> rms Offset Spread, 60 e<sup>-</sup> rms ENC and 70 kfps Frame Rate.
Proceedings of the 45th IEEE European Solid State Circuits Conference, 2019

2018
An Algorithm of an X-ray Hit Allocation to a Single Pixel in a Cluster and Its Test-Circuit Implementation.
IEEE Trans. Circuits Syst. I Regul. Pap., 2018

Asynchronous Approximation of a Center of Gravity for Pixel Detectors' Readout Circuits.
IEEE J. Solid State Circuits, 2018

Single Photon-Counting Pixel Readout Chip Operating Up to 1.2 Gcps/mm<sup>2</sup> for Digital X-Ray Imaging Systems.
IEEE J. Solid State Circuits, 2018

2017
Single photon counting integrated circuit operating with CdTe pixel detector.
Proceedings of the 24th International Conference Mixed Design of Integrated Circuits and Systems, 2017

2016
7.3kfps readout solution for 65k pixel X-Ray Camera working in zero dead-time mode.
Proceedings of the 2016 MIXDES, 2016

2015
Methodology of automation process of wafer tests.
Proceedings of the 22nd International Conference Mixed Design of Integrated Circuits & Systems, 2015

Digitally assisted low noise and fast signal processing charge sensitive amplifier for single photon counting systems.
Proceedings of the IEEE International Conference on Industrial Technology, 2015

32k Channels readout IC for single photon counting detectors with 75 μm pitch, ENC of 123 e- rms, 9 e- rms offset spread and 2% rms gain spread.
Proceedings of the IEEE Biomedical Circuits and Systems Conference, 2015

2014
Ultra fast X-ray detection systems in nanometer and 3D technologies.
Proceedings of the 21st International Conference Mixed Design of Integrated Circuits and Systems, 2014

23552-channel IC for single photon counting pixel detectors with 75 µm pitch, ENC of 89 e<sup>-</sup> rms, 19 e<sup>-</sup> rms offset spread and 3% rms gain spread.
Proceedings of the ESSCIRC 2014, 2014

ADCs in deep submicron technologies for ASICs of pixel architecture.
Proceedings of the 17th International Symposium on Design and Diagnostics of Electronic Circuits & Systems, 2014

Mismatch effects and their correction in large area ASICs.
Proceedings of the 17th International Symposium on Design and Diagnostics of Electronic Circuits & Systems, 2014

2013
FPGA Simulations of Charge Sharing Effect Compensation Algorithms for Implementation in Deep Sub-Micron Technologies.
Proceedings of the 15th International Conference on Computer Modelling and Simulation, 2013

2011
A low noise, Fast Pixel Readout IC working in single photon counting mode with energy window selection in 90 nm CMOS.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2011), 2011

Development of a fast readout chip in deep submicron technology for pixel hybrid detectors.
Proceedings of the 20th European Conference on Circuit Theory and Design, 2011

2006
Integrated charge sensitive amplifier with pole-zero cancellation circuit for high rates.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2006), 2006


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