Pingli Huang

According to our database1, Pingli Huang authored at least 9 papers between 2007 and 2013.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of four.

Timeline

Legend:

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In proceedings 
Article 
PhD thesis 
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Links

On csauthors.net:

Bibliography

2013
Ensemble of Cost-Sensitive Hypernetworks for Class-Imbalance Learning.
Proceedings of the IEEE International Conference on Systems, 2013

Applying Threshold SMOTE Algoritwith Attribute Bagging to Imbalanced Datasets.
Proceedings of the Rough Sets and Knowledge Technology - 8th International Conference, 2013

2012
A 12-bit 50-MS/s 3.3-mW SAR ADC with background digital calibration.
Proceedings of the IEEE 2012 Custom Integrated Circuits Conference, 2012

2011
SHA-less pipeline ADC design with sampling clock skew calibration
PhD thesis, 2011

A 12-bit, 45-MS/s, 3-mW Redundant Successive-Approximation-Register Analog-to-Digital Converter With Digital Calibration.
IEEE J. Solid State Circuits, 2011

SHA-Less Pipelined ADC With In Situ Background Clock-Skew Calibration.
IEEE J. Solid State Circuits, 2011

2010
A 12b 22.5/45MS/s 3.0mW 0.059mm<sup>2</sup> CMOS SAR ADC achieving over 90dB SFDR.
Proceedings of the IEEE International Solid-State Circuits Conference, 2010

SHA-less pipelined ADC converting 10th Nyquist band with in-situ clock-skew calibration.
Proceedings of the IEEE Custom Integrated Circuits Conference, 2010

2007
A Gradient-Based Algorithm for Sampling Clock Skew Calibration of SHA-less Pipeline ADCs.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2007), 2007


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