Pingfen Lin

According to our database1, Pingfen Lin authored at least 13 papers between 2008 and 2013.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of five.

Timeline

Legend:

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PhD thesis 
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Links

On csauthors.net:

Bibliography

2013
A 0.8 V 48 μW 82 dB SNDR 10-kHz BANDWIDTH ΣΔ MODULATOR IN 0.13-μM CMOS.
J. Circuits Syst. Comput., 2013

A TIME-DOMAIN 1.0-V/0.8-MW 6-BIT 125 MS/S FLASH ADC IN 65 NM CMOS.
J. Circuits Syst. Comput., 2013

1.1-V, 8-bit, 12 MS/s asynchronous reference-free successive-approximation-register analogue-todigital converter in 0.18 μm CMOS with separated capacitor arrays.
IET Circuits Devices Syst., 2013

2012
A 15fJ/conversion-step 8-bit 50 MS/s asynchronous SAR ADC with efficient charge recycling technique.
Microelectron. J., 2012

A 5-bit 125-MS/s 367-µW ADC in 65-nm CMOS.
Proceedings of the 55th IEEE International Midwest Symposium on Circuits and Systems, 2012

2011
A 48-mW, 12-bit, 150-MS/s pipelined ADC with digital calibration in 65nm CMOS.
Proceedings of the 2011 IEEE Custom Integrated Circuits Conference, 2011

A 1.2-V 250-MS/s 8-bit pipelined ADC in 0.13-µm CMOS.
Proceedings of the 2011 IEEE 9th International Conference on ASIC, 2011

2010
A Virtual-ADC Digital Background Calibration Technique for Multistage A/D Conversion.
IEEE Trans. Circuits Syst. II Express Briefs, 2010

An Offset Double Conversion Technique for Digital Calibration of Pipelined ADCs.
IEEE Trans. Circuits Syst. II Express Briefs, 2010

A 5.8-mW, 20-MHz, 4th-order programmable elliptic filter achieving over -80-dB IM3.
Proceedings of the IEEE Custom Integrated Circuits Conference, 2010

A fast bootstrapped switch for high-speed high-resolution A/D converter.
Proceedings of the IEEE Asia Pacific Conference on Circuits and Systems, 2010

2008
A new lock detector for Gardner's timing recovery method.
IEEE Trans. Consumer Electron., 2008

Hybrid carrier recovery, blind equalization for high-order QAM signal constellations.
IEEE Trans. Consumer Electron., 2008


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