Pingcheng Dong

Orcid: 0000-0003-3975-286X

According to our database1, Pingcheng Dong authored at least 15 papers between 2020 and 2025.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

2020
2021
2022
2023
2024
2025
0
1
2
3
4
5
6
1
2
3
2
2
2
2
1

Legend:

Book 
In proceedings 
Article 
PhD thesis 
Dataset
Other 

Links

On csauthors.net:

Bibliography

2025
Min-Pooling Cost Aggregation for Semi-Global Matching of Stereo Vision Processor.
IEEE Trans. Circuits Syst. II Express Briefs, January, 2025

2024
Stereo Matching Accelerator With Re-Computation Scheme and Data-Reused Pipeline for Autonomous Vehicles.
IEEE Trans. Circuits Syst. I Regul. Pap., June, 2024

Boundary and Relation Distillation for Semantic Segmentation.
CoRR, 2024

Live Demonstration: A 1920×1080 129fps 4.3pJ/pixel Stereo-Matching Processor for Low-power Applications.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2024

Genetic Quantization-Aware Approximation for Non-Linear Operations in Transformers.
Proceedings of the 61st ACM/IEEE Design Automation Conference, 2024

2023
A 1920×1080 129fps 4.3pJ/pixel Stereo-Matching Processor for Pico Aerial Vehicles.
Proceedings of the 49th IEEE European Solid State Circuits Conference, 2023

LLM-FP4: 4-Bit Floating-Point Quantized Transformers.
Proceedings of the 2023 Conference on Empirical Methods in Natural Language Processing, 2023

2022
A Compact Hardware Architecture for Bilateral Filter With the Combination of Approximate Computing and Look-Up Table.
IEEE Trans. Circuits Syst. II Express Briefs, 2022

Configurable Image Rectification and Disparity Refinement for Stereo Vision.
IEEE Trans. Circuits Syst. II Express Briefs, 2022

A 4.29nJ/pixel Stereo Depth Coprocessor With Pixel Level Pipeline and Region Optimized Semi-Global Matching for IoT Application.
IEEE Trans. Circuits Syst. I Regul. Pap., 2022

Post-Processing Refinement for Semi-Global Matching Algorithm Based on Real-Time FPGA.
Proceedings of the 35th IEEE International System-on-Chip Conference, 2022

Subpixel Interpolation Disparity Refinement for Semi-Global Matching.
Proceedings of the IEEE Asia Pacific Conference on Circuit and Systems, 2022

2021
Real-Time FPGA-Based Binocular Stereo Vision System with Semi-Global Matching Algorithm.
Proceedings of the 34th IEEE International System-on-Chip Conference, 2021

A 139 fps pixel-level pipelined binocular stereo vision accelerator with region-optimized semi-global matching.
Proceedings of the IEEE Asian Solid-State Circuits Conference, 2021

2020
Robot navigation based on pseudo-binocular stereo vision and linear fitting.
Proceedings of the 2020 IEEE International Conference on Integrated Circuits, 2020


  Loading...