Pingakshya Goswami

According to our database, Pingakshya Goswami authored at least 8 papers between 2016 and 2023.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of four.

2023

Machine learning based fast and accurate High Level Synthesis design space exploration: From graph to synthesis.

Pingakshya Goswami, Benjamin Carrión Schäfer, Dinesh Bhatia

Integr., 2023

Application of Machine Learning in FPGA EDA Tool Development.

Pingakshya Goswami, Dinesh Bhatia

IEEE Access, 2023

2022

Robust Estimation of FPGA Resources and Performance from CNN Models.

Pingakshya Goswami, Masoud Shahshahani, Dinesh Bhatia

Proceedings of the 35th International Conference on VLSI Design and 2022 21st International Conference on Embedded Systems, 2022

MLSBench: A Benchmark Set for Machine Learning based FPGA HLS Design Flows.

Pingakshya Goswami, Masoud Shahshahani, Dinesh Bhatia

Proceedings of the 13th IEEE Latin America Symposium on Circuits and System, 2022

Predicting Post-Route Quality of Results Estimates for HLS Designs using Machine Learning.

Pingakshya Goswami, Dinesh Bhatia

Proceedings of the 23rd International Symposium on Quality Electronic Design, 2022

2020

Automated Floorplanning for Partially Reconfigurable Designs on Heterogenrous FPGAs.

Pingakshya Goswami, Dinesh Bhatia

CoRR, 2020

MLSBench: A Synthesizable Dataset of HLS Designs to Support ML Based Design Flows.

Pingakshya Goswami, Masoud Shahshahani, Dinesh Bhatia

Proceedings of the FPGA '20: The 2020 ACM/SIGDA International Symposium on Field-Programmable Gate Arrays, 2020

2016

Floorplanning of Partially Reconfigurable Design on Heterogeneous FPGA (Abstract Only).

Pingakshya Goswami, Dinesh Bhatia

Proceedings of the 2016 ACM/SIGDA International Symposium on Field-Programmable Gate Arrays, 2016