Ping Gao
Affiliations:- Aries Design Automation, Chicago, IL, USA
According to our database1,
Ping Gao
authored at least 20 papers
between 2008 and 2016.
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Bibliography
2016
Application of Hierarchical Hybrid Encodings to Solve CSPs as Equivalent SAT Problems.
Proceedings of the International Symposium on Artificial Intelligence and Mathematics, 2016
2015
Exploiting abstraction, learning from random simulation, and SVM classification for efficient dynamic prediction of software health problems.
Proceedings of the Sixteenth International Symposium on Quality Electronic Design, 2015
2014
Proceedings of the Fifteenth International Symposium on Quality Electronic Design, 2014
Improving the efficiency of automated debugging of pipelined microprocessors by symmetry breaking in modular schemes for boolean encoding of cardinality.
Proceedings of the IEEE/ACM International Conference on Computer-Aided Design, 2014
Proceedings of the 19th Asia and South Pacific Design Automation Conference, 2014
2012
Automated debugging of counterexamples in formal verification of pipelined microprocessors.
Proceedings of the 17th Asia and South Pacific Design Automation Conference, 2012
2011
Modular Schemes for Constructing Equivalent Boolean Encodings of Cardinality Constraints and Application to Error Diagnosis in Formal Verification of Pipelined Microprocessors.
Proceedings of the Ninth Symposium on Abstraction, Reformulation, and Approximation, 2011
Efficient Pseudo-Boolean Satisfiability Encodings for Routing and Wavelength Assignment in Optical Networks.
Proceedings of the Ninth Symposium on Abstraction, Reformulation, and Approximation, 2011
CNF encodings of cardinality in formal methods for robustness checking of gate-level circuits.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2011), 2011
Exploiting Abstraction for Efficient Formal Verification of DSPs with Arrays of Reconfigurable Functional Units.
Proceedings of the Formal Methods and Software Engineering, 2011
Proceedings of the 2011 IEEE/ACM International Conference on Computer-Aided Design, 2011
Proceedings of the 16th Asia South Pacific Design Automation Conference, 2011
2010
Proceedings of the International Symposium on Artificial Intelligence and Mathematics, 2010
Method for Formal Verification of Soft-Error Tolerance Mechanisms in Pipelined Microprocessors.
Proceedings of the Formal Methods and Software Engineering, 2010
A method for debugging of pipelined processors in formal verification by correspondence checking.
Proceedings of the 15th Asia South Pacific Design Automation Conference, 2010
2009
Efficient SAT Techniques for Absolute Encoding of Permutation Problems: Application to Hamiltonian Cycles.
Proceedings of the Eighth Symposium on Abstraction, Reformulation, and Approximation, 2009
Efficient SAT-based techniques for Design of Experiments by using static variable ordering.
Proceedings of the 10th International Symposium on Quality of Electronic Design (ISQED 2009), 2009
Exploiting hierarchical encodings of equality to design independent strategies in parallel SMT decision procedures for a logic of equality.
Proceedings of the IEEE International High Level Design Validation and Test Workshop, 2009
Proceedings of the AI 2009: Advances in Artificial Intelligence, 2009
2008
Proceedings of the Design, Automation and Test in Europe, 2008