Pilin Junsangsri

According to our database, Pilin Junsangsri authored at least 15 papers between 2010 and 2018.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of four.

2018

CCE: A Combined SRAM and Non Volatile Cache for Endurance of Next Generation Multilevel Non Volatile Memories in Embedded Systems.

Linbin Chen, Pilin Junsangsri, Pedro Reviriego, Fabrizio Lombardi

Proceedings of the 14th IEEE/ACM International Symposium on Nanoscale Architectures, 2018

Multiple Fault Detection in Nano Programmable Logic Arrays.

Pilin Junsangsri, Fabrizio Lombardi

Proceedings of the 2018 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems, 2018

2017

Design of a Low-Power Non-Volatile Programmable Inverter Cell for COGRE-based Circuits.

Pilin Junsangsri, Fabrizio Lombardi, Salin Junsangsri, Martin Margala

Proceedings of the on Great Lakes Symposium on VLSI 2017, 2017

2016

Logic-in-Memory With a Nonvolatile Programmable Metallization Cell.

Pilin Junsangsri, Jie Han, Fabrizio Lombardi

IEEE Trans. Very Large Scale Integr. Syst., 2016

Design of a hybrid non-volatile SRAM cell for concurrent SEU detection and correction.

Pilin Junsangsri, Jie Han, Fabrizio Lombardi

Integr., 2016

2015

Circuits for a Perpendicular Magnetic Anisotropic (PMA) Racetrack Memory.

Pilin Junsangsri, Jie Han, Fabrizio Lombardi

IEEE Trans. Multi Scale Comput. Syst., 2015

A Ternary Content Addressable Cell Using a Single Phase Change Memory (PCM).

Pilin Junsangsri, Fabrizio Lombardi, Jie Han

Proceedings of the 25th edition on Great Lakes Symposium on VLSI, GLVLSI 2015, Pittsburgh, PA, USA, May 20, 2015

2014

HSPICE macromodel of a Programmable Metallization Cell (PMC) and its application to memory design.

Pilin Junsangsri, Fabrizio Lombardi, Jie Han

Proceedings of the IEEE/ACM International Symposium on Nanoscale Architectures, 2014

A memristor-based TCAM (Ternary Content Addressable Memory) cell.

Pilin Junsangsri, Fabrizio Lombardi, Jie Han

Proceedings of the IEEE/ACM International Symposium on Nanoscale Architectures, 2014

A system-level scheme for resistance drift tolerance of a multilevel phase change memory.

Pilin Junsangsri, Jie Han, Fabrizio Lombardi

Proceedings of the 2014 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems, 2014

A hybrid non-volatile SRAM cell with concurrent SEU detection and correction.

Pilin Junsangsri, Fabrizio Lombardi, Jie Han

Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2014

2012

Macromodeling a phase change memory (PCM) cell by HSPICE.

Pilin Junsangsri, Fabrizio Lombardi, Jie Han

Proceedings of the 2012 IEEE/ACM International Symposium on Nanoscale Architectures, 2012

A memristor-based TCAM (ternary content addressable memory) cell: design and evaluation.

Pilin Junsangsri, Fabrizio Lombardi

Proceedings of the Great Lakes Symposium on VLSI 2012, 2012

2011

A memristor-based memory cell using ambipolar operation.

Pilin Junsangsri, Fabrizio Lombardi

Proceedings of the IEEE 29th International Conference on Computer Design, 2011

2010

Time/Temperature Degradation of Solar Cells under the Single Diode Model.

Pilin Junsangsri, Fabrizio Lombardi

Proceedings of the 25th IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems, 2010