Piia Saastamoinen

According to our database, Piia Saastamoinen authored at least 4 papers between 2008 and 2012.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of five.

2012

Improving logic-to-memory ratio in an embedded Multi-Processor system via code compression.

Roberto Airoldi, Piia Saastamoinen, Jari Nurmi

Proceedings of the 2012 International Symposium on System on Chip, 2012

2010

Parameterized decompression hardware for a program memory compression system.

Piia Saastamoinen, Jari Nurmi

Proceedings of the 2010 International Symposium on System on Chip, SoC 2010, Tampere, 2010

2009

Minimizing area costs in GPS applications on a programmable DSP by code compression.

Piia Saastamoinen, Jari Nurmi, Ilkka Saastamoinen, Mikko Laiho

Proceedings of the 2008 IEEE International Symposium on System-on-Chip, 2009

2008

Code compression in DSP processor systems.

Piia Saastamoinen, Ilkka Saastamoinen, Jari Nurmi

Int. J. Embed. Syst., 2008