Pietro Maris Ferreira

Orcid: 0000-0002-0038-9058

Affiliations:
  • University Paris-Saclay, Gif-sur-Yvette, France


According to our database1, Pietro Maris Ferreira authored at least 43 papers between 2007 and 2024.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of four.

Timeline

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Bibliography

2024
Design of Low-Power 5.8-GHz ULV LNTAs using Normalized Biasing Metric.
Proceedings of the 37th SBC/SBMicro/IEEE Symposium on Integrated Circuits and Systems Design, 2024

Power Consumption Estimation of Digital Predistortion based on Spiking Neural Networks.
Proceedings of the 22nd IEEE Interregional NEWCAS Conference, 2024

A gm/Id based methodology to estimate OTA requirements in low-pass discrete time Σ∆-ADCs.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2024

2023
Physics Informed Spiking Neural Networks: Application to Digital Predistortion for Power Amplifier Linearization.
IEEE Access, 2023

Revisiting the Ultra-Low Power Electronic Neuron Towards a Faithful Biomimetic Behavior.
Proceedings of the 36th SBC/SBMicro/IEEE/ACM Symposium on Integrated Circuits and Systems Design, 2023

Jitter Noise Impact on Analog Spiking Neural Networks: STDP Limitations.
Proceedings of the 36th SBC/SBMicro/IEEE/ACM Symposium on Integrated Circuits and Systems Design, 2023

A Tunable Morris-Lecar Spiking Neuron in CMOS.
Proceedings of the 66th IEEE International Midwest Symposium on Circuits and Systems, 2023

2022
Analysis and Implementation of OVSF Address Decoders.
IEEE Trans. Circuits Syst. II Express Briefs, 2022

Deep Neural Network Feasibility Using Analog Spiking Neurons.
Proceedings of the 35th SBC/SBMicro/IEEE/ACM Symposium on Integrated Circuits and Systems Design, 2022

1.2 nW Neuromorphic Enhanced Wake-Up Radio.
Proceedings of the 35th SBC/SBMicro/IEEE/ACM Symposium on Integrated Circuits and Systems Design, 2022

Sub-nJ per Decision Schmitt Trigger Comparator for Neuromorphic Spike Detection in 55 nm Technology.
Proceedings of the 7th IEEE Forum on Research and Technologies for Society and Industry Innovation, 2022

Smart IoT - Implementation of Neuromorphic Circuits.
Proceedings of the 7th IEEE Forum on Research and Technologies for Society and Industry Innovation, 2022

Behavioral Modeling of Nonlinear Power Amplifiers Using Spiking Neural Networks.
Proceedings of the 20th IEEE Interregional NEWCAS Conference, 2022

Analysis of an Inverter-Based CMOS Envelope Detector.
Proceedings of the 29th IEEE International Conference on Electronics, Circuits and Systems, 2022

2021
A Temperature-Aware Framework on g<sub>m</sub>/I<sub>D</sub>-Based Methodology Using 180 nm SOI From -40 °C to 200 °C.
IEEE Open J. Circuits Syst., 2021

A comparative study between E-neurons mathematical model and circuit model.
IET Circuits Devices Syst., 2021

A Flexible Low-Cost Discrete-Time Wake-up Receiver for LoRaWAN applications.
Proceedings of the 19th IEEE International New Circuits and Systems Conference, 2021

2020
Design of integrated all-pass filters with linear group delay for analog signal processing applications.
Int. J. Circuit Theory Appl., 2020

A highly-linear, integration-compatible output metric for amplitude-modulated resonant sensors based on weakly-coupled resonators.
Proceedings of the 2020 IEEE Sensors, Rotterdam, The Netherlands, October 25-28, 2020, 2020

2019
Implications of Small Geometry Effects on g<sub>m</sub>/I<sub>D</sub> Based Design Methodology for Analog Circuits.
IEEE Trans. Circuits Syst. II Express Briefs, 2019

Energy efficient fJ/spike LTS e-Neuron using 55-nm node.
Proceedings of the 32nd Symposium on Integrated Circuits and Systems Design, 2019

2018
A -40 to 250°C Triple Modular Redundancy Temperature Sensor for Turbofan Engines.
Proceedings of the 31st Symposium on Integrated Circuits and Systems Design, 2018

A CMOS Envelope Detector for Low Power Wireless Receiver Applications.
Proceedings of the 16th IEEE International New Circuits and Systems Conference, 2018

Design and Synthesis of Arbitrary Group Delay Filters for Integrated Analog Signal Processing.
Proceedings of the 25th IEEE International Conference on Electronics, Circuits and Systems, 2018

O-Band 50Gb/s Ring Modulator in a 300mm Si Photonic Platform.
Proceedings of the European Conference on Optical Communication, 2018

2017
A temperature-aware analysis of latched comparators for smart vehicle applications.
Proceedings of the 30th Symposium on Integrated Circuits and Systems Design: Chip on the Sands, 2017

Design considerations of a CMOS envelope detector for low power wireless receiver applications.
Proceedings of the 15th IEEE International New Circuits and Systems Conference, 2017

Delay estimation and measurement circuit for a high-speed CMOS clocked comparator.
Proceedings of the 2017 European Conference on Circuit Theory and Design, 2017

2016
0.18-µm CMOS driver optimization for maximum data rate under power and area constraints.
Proceedings of the 14th IEEE International New Circuits and Systems Conference, 2016

Monolithic integration of mutually injection-locked CMOS-MEMS oscillators for differential resonant sensing applications.
Proceedings of the 2016 IEEE International Conference on Electronics, Circuits and Systems, 2016

2015
A Unified Explanation of g<sub>m</sub>/I<sub>D</sub>-Based Noise Analysis.
J. Circuits Syst. Comput., 2015

Optimization Methodology for a 460-MHz-GBW and 80-dB-SNR Low-Power Current-Mode Amplifier.
Proceedings of the 28th Symposium on Integrated Circuits and Systems Design, 2015

A high-Q tunable grounded negative inductor for small antennas and broadband metamaterials.
Proceedings of the IEEE 13th International New Circuits and Systems Conference, 2015

2014
A g<sub>m</sub>/I<sub>D</sub>-Based Noise Optimization for CMOS Folded-Cascode Operational Amplifier.
IEEE Trans. Circuits Syst. II Express Briefs, 2014

1-20 Ghz kΩ-range BiCMOS 55 nm reflectometer.
Proceedings of the IEEE 12th International New Circuits and Systems Conference, 2014

2013
Transconductance/drain current based sensitivity analysis for analog CMOS integrated circuits.
Proceedings of the IEEE 11th International New Circuits and Systems Conference, 2013

2012
1.4 V and 300 nA UHF passive RFID voltage regulator.
Proceedings of the 10th IEEE International NEWCAS Conference, 2012

2011
A synthesis methodology for AMS/RF circuit reliability: Application to a DCO design.
Microelectron. Reliab., 2011

A new synthesis methodology for reliable RF front-end Design.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2011), 2011

2010
Current mode read-out circuit for InGaAs photodiode applications.
Microelectron. J., 2010

AMS and RF design for reliability methodology.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2010), May 30, 2010

2008
Current mode read-out circuit for infrared photodiode applications in 0.35 <i>mu</i>m cmos.
Proceedings of the 21st Annual Symposium on Integrated Circuits and Systems Design, 2008

2007
A CMOS AM demodulator for instrumentation applications.
Proceedings of the 20th Annual Symposium on Integrated Circuits and Systems Design, 2007


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