Pietro Caragiulo

Orcid: 0000-0003-4076-7292

According to our database1, Pietro Caragiulo authored at least 6 papers between 2019 and 2024.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of four.

Timeline

Legend:

Book 
In proceedings 
Article 
PhD thesis 
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Links

On csauthors.net:

Bibliography

2024
A 1024-Channel 268-nW/Pixel 36×36 μm<sup>2</sup>/Channel Data-Compressive Neural Recording IC for High-Bandwidth Brain-Computer Interfaces.
IEEE J. Solid State Circuits, April, 2024

2022
A 56 GS/s 8-bit 0.011 mm<sup>2</sup> 4x Delta-Interleaved Switched-Capacitor DAC in 16nm FinFET CMOS.
Proceedings of the 48th IEEE European Solid State Circuits Conference, 2022

2021
A 2✖ Time-Interleaved 28-GS/s 8-Bit 0.03-mm<sup>2</sup> Switched-Capacitor DAC in 16-nm FinFET CMOS.
IEEE J. Solid State Circuits, 2021

2020
A Compact 14 GS/s 8-Bit Switched-Capacitor DAC in 16 nm FinFET CMOS.
Proceedings of the IEEE Symposium on VLSI Circuits, 2020

Read-Out Architecture of CRYO System-on-Chip ASIC for Noble Liquid TPC Detectors.
Proceedings of the 63rd IEEE International Midwest Symposium on Circuits and Systems, 2020

2019
Single-Ended-to-Differential Sampling Technique for Sigma Delta ADCs in X-Ray Detectors.
Proceedings of the 62nd IEEE International Midwest Symposium on Circuits and Systems, 2019


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