Pietro Babighian

According to our database, Pietro Babighian authored at least 9 papers between 2004 and 2017.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of three.

2017

Systematic defect detection methodology for volume diagnosis: A data mining perspective.

Chuanhe Jay Shan, Pietro Babighian, Yan Pan, John M. Carulli, Li-C. Wang

Proceedings of the IEEE International Test Conference, 2017

2007

Interactive presentation: PowerQuest: trace driven data mining for power optimization.

Pietro Babighian, Gila Kamhi, Moshe Y. Vardi

Proceedings of the 2007 Design, Automation and Test in Europe Conference and Exposition, 2007

2006

Methodologies and techniques for power optimization of digital circuits.

Pietro Babighian

PhD thesis, 2006

Enabling fine-grain leakage management by voltage anchor insertion.

Pietro Babighian, Luca Benini, Alberto Macii, Enrico Macii

Proceedings of the Conference on Design, Automation and Test in Europe, 2006

2005

A scalable algorithm for RTL insertion of gated clocks based on ODCs computation.

Pietro Babighian, Luca Benini, Enrico Macii

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2005

Low-overhead state-retaining elements for low-leakage MTCMOS design.

Pietro Babighian, Luca Benini, Alberto Macii, Enrico Macii

Proceedings of the 15th ACM Great Lakes Symposium on VLSI 2005, 2005

2004

Post-layout leakage power minimization based on distributed sleep transistor insertion.

Pietro Babighian, Luca Benini, Alberto Macii, Enrico Macii

Proceedings of the 2004 International Symposium on Low Power Electronics and Design, 2004

Sizing and Characterization of Leakage-Control Cells for Layout-Aware Distributed Power-Gating.

Pietro Babighian, Luca Benini, Enrico Macii

Proceedings of the 2004 Design, 2004

A Scalable ODC-Based Algorithm for RTL Insertion of Gated Clocks.

Pietro Babighian, Luca Benini, Enrico Macii

Proceedings of the 2004 Design, 2004