Pierre-Yves Peneau
Orcid: 0000-0002-0187-2009
According to our database1,
Pierre-Yves Peneau
authored at least 7 papers
between 2016 and 2021.
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Bibliography
2021
Proceedings of the ASSS '21: Proceedings of the 2021 International Symposium on Advanced Security on Software and Systems, 2021
2020
Proceedings of the IEEE European Symposium on Security and Privacy Workshops, 2020
2018
Intégration de technologies de mémoires non volatiles émergentes dans la hiérarchie de caches pour améliorer l'efficacité énergétique. (Integration of emerging non volatile memory in the cache hierarchy for energy-efficiency improvement).
PhD thesis, 2018
Proceedings of the Architecture of Computing Systems - ARCS 2018, 2018
2017
Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2017
2016
Loop optimization in presence of STT-MRAM caches: A study of performance-energy tradeoffs.
Proceedings of the 26th International Workshop on Power and Timing Modeling, 2016
Proceedings of the 10th IEEE International Symposium on Embedded Multicore/Many-core Systems-on-Chip, 2016