Pierre-Yves Calland

According to our database1, Pierre-Yves Calland authored at least 8 papers between 1995 and 1999.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

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Bibliography

1999
Tiling on systems with communication/computation overlap.
Concurr. Pract. Exp., 1999

1998
Circuit Retiming Applied to Decomposed Software Pipelining.
IEEE Trans. Parallel Distributed Syst., 1998

Retiming DAGs [direct acyclic graph].
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 1998

On the Removal of Anti- and Output-Dependences.
Int. J. Parallel Program., 1998

1997
Plugging Anti and Output Dependence Removal Techniques Into Loop Parallelization Algorithm.
Parallel Comput., 1997

Tiling with limited resources.
Proceedings of the 1997 International Conference on Application-Specific Systems, 1997

1996
A New Guaranteed Heuristic for the Software Pipelining Problem.
Proceedings of the 10th international conference on Supercomputing, 1996

1995
Precise Tiling for Uniform Loop Nests.
Proceedings of the International Conference on Application Specific Array Processors (ASAP'95), 1995


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