Pierre Greisen

According to our database1, Pierre Greisen authored at least 18 papers between 2010 and 2016.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

Legend:

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PhD thesis 
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Links

On csauthors.net:

Bibliography

2016
Hybrid ASIC/FPGA System for Fully Automatic Stereo-to-Multiview Conversion Using IDW.
IEEE Trans. Circuits Syst. Video Technol., 2016

2013
Hardware architectures for real-time video processing and view synthesis.
PhD thesis, 2013

Automatic View Synthesis by Image-Domain-Warping.
IEEE Trans. Image Process., 2013

Evaluation and FPGA Implementation of Sparse Linear Solvers for Video Processing Applications.
IEEE Trans. Circuits Syst. Video Technol., 2013

A real-time 720p feature extraction core based on Semantic Kernels Binarized.
Proceedings of the 21st IEEE/IFIP International Conference on VLSI and System-on-Chip, 2013

A Complete Real-Time Feature Extraction and Matching System Based on Semantic Kernels Binarized.
Proceedings of the VLSI-SoC: At the Crossroads of Emerging Trends, 2013

Efficient image resampling for multiview displays.
Proceedings of the IEEE International Conference on Acoustics, 2013

MADmax: A 1080p stereo-to-multiview rendering ASIC in 65 nm CMOS based on image domain warping.
Proceedings of the ESSCIRC 2013, 2013

2012
Analysis and VLSI Implementation of EWA Rendering for Real-Time HD Video Applications.
IEEE Trans. Circuits Syst. Video Technol., 2012

Spatially-Varying Image Warping: Evaluations and VLSI Implementations.
Proceedings of the VLSI-SoC: From Algorithms to Circuits and System-on-Chip Design, 2012

A general-transformation EWA view rendering engine for 1080p video in 130 nm CMOS.
Proceedings of the 20th IEEE/IFIP International Conference on VLSI and System-on-Chip, 2012

Real-time velocity estimation based on optical flow and disparity matching.
Proceedings of the 2012 IEEE/RSJ International Conference on Intelligent Robots and Systems, 2012

Algorithm and VLSI Architecture for Real-Time 1080p60 Video Retargeting.
Proceedings of the EUROGRAPHICS Conference on High Performance Graphics 2012, 2012

2011
Computational stereo camera system with programmable control loop.
ACM Trans. Graph., 2011

An FPGA-based processing pipeline for high-definition stereo video.
EURASIP J. Image Video Process., 2011

Disparity-Aware Stereo 3D Production Tools.
Proceedings of the Conference for Visual Media Production, 2011

2010
Simulation and Emulation of MIMO Wireless Baseband Transceivers.
EURASIP J. Wirel. Commun. Netw., 2010

Matching pursuit: Evaluation and implementatio for LTE channel estimation.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2010), May 30, 2010


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