Pierre G. Paulin

According to our database, Pierre G. Paulin authored at least 74 papers between 1986 and 2014.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of three.

2014

Fast and accurate implementation of Canny edge detector on embedded many-core platform.

Taieb Lamine Ben Cheikh, Gabriela Nicolescu, Jelena Trajkovic, Youcef Bouchebaba, Pierre G. Paulin

Proceedings of the IEEE 12th International New Circuits and Systems Conference, 2014

2013

Parallel programming patterns for multi-processor SoC: Application to video processing.

Pierre G. Paulin, Ali Erdem Özcan, Vincent Gagné, Bruno Lavigueur, Olivier Benny

ACM Trans. Embed. Comput. Syst., 2013

Reduction methods for adapting optical network on chip topologies to 3D architectures.

Sébastien Le Beux, Ian O'Connor, Gabriela Nicolescu, Guy Bois, Pierre G. Paulin

Microprocess. Microsystems, 2013

Mapping data-intensive applications to an explicitly managed memory architecture: Challenges and solutions.

Pierre G. Paulin

Proceedings of the 11th IEEE Symposium on Embedded Systems for Real-time Multimedia, 2013

A novel compilation approach for image processing graphs on a many-core platform with explicitly managed memory.

Thierry Lepley, Pierre G. Paulin, Eric Flamand

Proceedings of the International Conference on Compilers, 2013

A dynamic stream link for efficient data flow control in NoC based heterogeneous MPSoC.

Claude Helmstetter, Sylvain Basset, Romain Lemaire, Fabien Clermidy, Pascal Vivet, Michel Langevin, Chuck Pilkington, Pierre G. Paulin, Didier Fuin

Proceedings of the 18th Asia and South Pacific Design Automation Conference, 2013

2012

Integrating Memory Optimization with Mapping Algorithms for Multi-Processors System-on-Chip.

Bruno Girodias, Luiza Gheorghe Iugan, Youcef Bouchebaba, Gabriela Nicolescu, El Mostapha Aboulhamid, Michel Langevin, Pierre G. Paulin

ACM Trans. Embed. Comput. Syst., 2012

MpAssign: a framework for solving the many-core platform mapping problem.

Youcef Bouchebaba, Ali Erdem Özcan, Pierre G. Paulin, Gabriela Nicolescu

Softw. Pract. Exp., 2012

On the Verification of a WiMax Design Using Symbolic Simulation.

Salim Ismail Al-Akhras, Sofiène Tahar, Gabriela Nicolescu, Michel Langevin, Pierre G. Paulin

Proceedings of the Proceedings Fourth International Symposium on Symbolic Computation in Software Science, 2012

2011

Optical Ring Network-on-Chip (ORNoC): Architecture and design methodology.

Sébastien Le Beux, Jelena Trajkovic, Ian O'Connor, Gabriela Nicolescu, Guy Bois, Pierre G. Paulin

Proceedings of the Design, Automation and Test in Europe, 2011

Programming challenges & solutions for multi-processor SoCs: an industrial perspective.

Pierre G. Paulin

Proceedings of the 48th Design Automation Conference, 2011

2010

Combining mapping and partitioning exploration for NoC-based embedded systems.

Sébastien Le Beux, Guy Bois, Gabriela Nicolescu, Youcef Bouchebaba, Michel Langevin, Pierre G. Paulin

J. Syst. Archit., 2010

Multi-Optical Network-on-Chip for Large Scale MPSoC.

Sébastien Le Beux, Jelena Trajkovic, Ian O'Connor, Gabriela Nicolescu, Guy Bois, Pierre G. Paulin

IEEE Embed. Syst. Lett., 2010

Combining memory optimization with mapping of multimedia applications for multi-processors system-on-chip.

Bruno Girodias, Luiza Gheorghe, Youcef Bouchebaba, Gabriela Nicolescu, El Mostapha Aboulhamid, Michel Langevin, Pierre G. Paulin

Proceedings of the 21st IEEE International Symposium on Rapid System Prototyping, 2010

MpAssign: A framework for solving the many-core platform mapping problem.

Youcef Bouchebaba, Pierre G. Paulin, Ali Erdem Özcan, Bruno Lavigueur, Michel Langevin, Olivier Benny, Gabriela Nicolescu

Proceedings of the 21st IEEE International Symposium on Rapid System Prototyping, 2010

A system-level exploration flow for optica network on chip (ONoC) in 3D MPSoC.

Sébastien Le Beux, Gabriela Nicolescu, Guy Bois, Pierre G. Paulin

Proceedings of the International Symposium on Circuits and Systems (ISCAS 2010), May 30, 2010

2009

Multiprocessor, Multithreading and Memory Optimization for On-Chip Multimedia Applications.

Bruno Girodias, Youcef Bouchebaba, Gabriela Nicolescu, El Mostapha Aboulhamid, Pierre G. Paulin, Bruno Lavigueur

J. Signal Process. Syst., 2009

Optimizing Configuration and Application Mapping for MPSoC Architectures.

Sébastien Le Beux, Gabriela Nicolescu, Guy Bois, Youcef Bouchebaba, Michel Langevin, Pierre G. Paulin

Proceedings of the NASA/ESA Conference on Adaptive Hardware and Systems, 2009

2008

Multicore design is the challenge! what is the solution?

Eshel Haritan, Toshihiro Hattori, Hiroyuki Yagi, Pierre G. Paulin, Wayne H. Wolf, Achim Nohl, Drew Wingard, Mike Muller

Proceedings of the 45th Design Automation Conference, 2008

Reliable performance analysis of a multicore multithreaded system-on-chip.

Simon Schliecker, Mircea Negrean, Gabriela Nicolescu, Pierre G. Paulin, Rolf Ernst

Proceedings of the 6th International Conference on Hardware/Software Codesign and System Synthesis, 2008

2007

MPSoC memory optimization using program transformation.

Youcef Bouchebaba, Bruno Girodias, Gabriela Nicolescu, El Mostapha Aboulhamid, Bruno Lavigueur, Pierre G. Paulin

ACM Trans. Design Autom. Electr. Syst., 2007

Roundtable: Design and CAD Challenges for Leading-Edge Multimedia Designs.

Andrew B. Kahng, Ira Chayut, John M. Cohn, Toshihiro Hattori, Jeong-Taek Kong, Pierre G. Paulin, Rich Tobias

IEEE Des. Test Comput., 2007

Roundtable: Envisioning the Future for Multiprocessor SoC.

Ahmed Amine Jerraya, Olivier Franza, Markus Levy, Masao Nakaya, Pierre G. Paulin, Ulrich Ramacher, Deepu Talla, Wayne H. Wolf

IEEE Des. Test Comput., 2007

An FPGA Implementation of a Scalable Network-on-Chip Based on the Token Ring Concept.

Karim Hadjiat, Francis St-Pierre, Guy Bois, Yvon Savaria, Michel Langevin, Pierre G. Paulin

Proceedings of the 14th IEEE International Conference on Electronics, 2007

MPSoC memory optimization for digital camera applications.

Youcef Bouchebaba, Bruno Lavigueur, Bruno Girodias, Gabriela Nicolescu, Pierre G. Paulin

Proceedings of the Tenth Euromicro Conference on Digital System Design: Architectures, 2007

A future of customizable processors: are we there yet?

Laura Pozzi, Pierre G. Paulin

Proceedings of the 2007 Design, Automation and Test in Europe Conference and Exposition, 2007

Two-level tiling for MPSoC architecture.

Youcef Bouchebaba, Essaid Bensoudane, Bruno Lavigueur, Pierre G. Paulin, Gabriela Nicolescu

Proceedings of the IEEE International Conference on Application-Specific Systems, 2007

2006

Parallel programming models for a multiprocessor SoC platform applied to networking and multimedia.

Pierre G. Paulin, Chuck Pilkington, Michel Langevin, Essaid Bensoudane, Damien Lyonnard, Olivier Benny, Bruno Lavigueur, David Lo, Giovanni Beltrame, Vincent Gagné, Gabriela Nicolescu

IEEE Trans. Very Large Scale Integr. Syst., 2006

An Application Mapping Methodology and Case Study for Multi-Processor On-Chip Architectures.

Giovanni Beltrame, Donatella Sciuto, Cristina Silvano, Pierre G. Paulin, Essaid Bensoudane

Proceedings of the IFIP VLSI-SoC 2006, 2006

Application-Level Memory Optimization for MPSoC.

Bruno Girodias, Youcef Bouchebaba, Gabriela Nicolescu, El Mostapha Aboulhamid, Pierre G. Paulin, Bruno Lavigueur

Proceedings of the 17th IEEE International Workshop on Rapid System Prototyping (RSP 2006), 2006

Distributed object models for multi-processor SoC's, with application to low-power multimedia wireless systems.

Pierre G. Paulin, Chuck Pilkington, Michel Langevin, Essaid Bensoudane, Olivier Benny, Damien Lyonnard, Bruno Lavigueur, David Lo

Proceedings of the Conference on Design, Automation and Test in Europe, 2006

2005

A Multiprocessor SoC Platform and Tools for Communications Applications.

Essaid Bensoudane, Gabriela Nicolescu, Pierre G. Paulin, Michel Langevin, Chuck Pilkington, Damien Lyonnard

Proceedings of the Embedded Systems Handbook., 2005

2004

Designing High Quality, Scaleable SoC??s with Heterogeneous Components.

Pierre G. Paulin

Proceedings of the 5th International Symposium on Quality of Electronic Design (ISQED 2004), 2004

Automatic Mapping of Parallel Applications onto Multi-Processor Platforms: A Multimedia Application.

Pierre G. Paulin

Proceedings of the 2004 Euromicro Symposium on Digital Systems Design (DSD 2004), Architectures, Methods and Tools, 31 August, 2004

Application of a Multi-Processor SoC Platform to High-Speed Packet Forwarding.

Pierre G. Paulin, Chuck Pilkington, Essaid Bensoudane, Michel Langevin, Damien Lyonnard

Proceedings of the 2004 Design, 2004

DATE Panel: Chips of the Future: Soft, Crunchy or Hard?

Pierre G. Paulin

Proceedings of the 2004 Design, 2004

System level design: six success stories in search of an industry.

Francine Bacchini, Pierre G. Paulin, Reinaldo A. Bergamaschi, Raj Pawate, Arie Bernstein, Ramesh Chandra, Mohamed Ben-Romdhane

Proceedings of the 41th Design Automation Conference, 2004

Parallel programming models for a multi-processor SoC platform applied to high-speed traffic management.

Pierre G. Paulin, Chuck Pilkington, Michel Langevin, Essaid Bensoudane, Gabriela Nicolescu

Proceedings of the 2nd IEEE/ACM/IFIP International Conference on Hardware/Software Codesign and System Synthesis, 2004

2003

Network Processing Challenges and an Experimental NPU Platform.

Pierre G. Paulin, Chuck Pilkington, Essaid Bensoudane

Proceedings of the 2003 Design, 2003

System-on-chip beyond the nanometer wall.

Philippe Magarshack, Pierre G. Paulin

Proceedings of the 40th Design Automation Conference, 2003

2002

FlexWare: A Retargetable Embedded-Software Development Environment.

Pierre G. Paulin, Miguel Santana

IEEE Des. Test Comput., 2002

StepNP: A System-Level Exploration Platform for Network Processors.

Pierre G. Paulin, Chuck Pilkington, Essaid Bensoudane

IEEE Des. Test Comput., 2002

Who Owns the Platform?

Vassilios Gerousis, Oz Levia, Pierre G. Paulin, Mark Pinto, Chris Rowen, Gabriele Saucier

Proceedings of the 2002 Design, 2002

2001

Embedded systems technologies for application-specific architecture platforms.

Pierre G. Paulin

Proceedings of the 14th International Symposium on Systems Synthesis, 2001

Programming models for network processors (Panel).

Ahmed Amine Jerraya, Pierre G. Paulin, Richard Norman, Feliks J. Welfeld

Proceedings of the 14th International Symposium on Systems Synthesis, 2001

Network processors: a perspective on market requirements, processor architectures and embedded S/W tools.

Pierre G. Paulin, Faraydon Karim, Paul Bromley

Proceedings of the Conference on Design, Automation and Test in Europe, 2001

2000

Towards Application-Specific Architecture Platforms: Embedded Systems Design Automation Technologies.

Pierre G. Paulin

Proceedings of the 26th EUROMICRO 2000 Conference, 2000

The Future of Flexible HW Platform Architectures Panel Discussion.

Rolf Ernst, Grant Martin, Oz Levia, Pierre G. Paulin, Stamatis Vassiliadis, Kees A. Vissers

Proceedings of the 2000 Design, 2000

1998

Automatic VHDL-C Interface Generation for Distributed Cosimulation: Application to Large Design Examples.

Carlos A. Valderrama, François Naçabal, Pierre G. Paulin, Ahmed Amine Jerraya

Des. Autom. Embed. Syst., 1998

1997

Embedded software in real-time signal processing systems: application and architecture trends.

Pierre G. Paulin, Clifford Liem, Marco Cornero, François Naçabal, Gert Goossens

Proc. IEEE, 1997

Embedded software in real-time signal processing systems: design technologies.

Gert Goossens, Johan Van Praet, Dirk Lanneer, Werner Geurts, Augusli Kifli, Clifford Liem, Pierre G. Paulin

Proc. IEEE, 1997

System-on-a-Chip Cosimulation and Compilation.

Clifford Liem, François Naçabal, Carlos A. Valderrama, Pierre G. Paulin, Ahmed Amine Jerraya

IEEE Des. Test Comput., 1997

Compilation Methods for the Address Calculation Units of Embedded Processor Systems.

Clifford Liem, Pierre G. Paulin, Ahmed Amine Jerraya

Des. Autom. Embed. Syst., 1997

ReCode: the design and re-design of the instruction codes for embedded instruction-set processors.

Clifford Liem, Pierre G. Paulin, Ahmed Amine Jerraya

Proceedings of the European Design and Test Conference, 1997

Am Embedded System Case Study: The Firm Ware Development Environment for a Multimedia Audio Processor.

Clifford Liem, Marco Cornero, Miguel Santana, Pierre G. Paulin, Ahmed Amine Jerraya, Jean-Marc Gentit, Jean Lopez, Xavier Figari, Laurent Bergher

Proceedings of the 34st Conference on Design Automation, 1997

1996

Automatic generation of interfaces for distributed C-VHDL cosimulation of embedded systems: an industrial experience.

Carlos A. Valderrama, François Naçabal, Pierre G. Paulin, Ahmed Amine Jerraya

Proceedings of the Seventh IEEE International Workshop on Rapid System Prototyping (RSP '96), 1996

Address Calculation for Retargetable Compilation and Exploration of Instruction-Set Architectures.

Clifford Liem, Pierre G. Paulin, Ahmed Amine Jerraya

Proceedings of the 33st Conference on Design Automation, 1996

1995

DSP design tool requirements for embedded systems: A telecommunications industrial perspective.

Pierre G. Paulin, Clifford Liem, Trevor C. May, Shailesh Sutarwala

J. VLSI Signal Process., 1995

Industrial experience using rule-driven retargetable code generation for multimedia applications.

Clifford Liem, Pierre G. Paulin, Marco Cornero, Ahmed Amine Jerraya

Proceedings of the 8th International Symposium on System Synthesis (ISSS 1995), 1995

High-level synthesis and codesign methods: an application to a videophone codec.

Pierre G. Paulin, Jean Fréhel, Michel Harrand, Elisabeth Berrebi, Clifford Liem, François Naçabal, Jean-Claude Herluison

Proceedings of the Proceedings EURO-DAC'95, 1995

1994

CodeSyn: a retargetable code synthesis system (abstract).

Pierre G. Paulin, Clifford Liem, Trevor C. May, Shailesh Sutarwala

Proceedings of the 7th International Symposium on High Level Synthesis, 1994

Register assignment through resource classification for ASIP microcode generation.

Clifford Liem, Trevor C. May, Pierre G. Paulin

Proceedings of the 1994 IEEE/ACM International Conference on Computer-Aided Design, 1994

Instruction-Set Matching and Selection for DSP and ASIP Code Generation.

Clifford Liem, Trevor C. May, Pierre G. Paulin

Proceedings of the EDAC - The European Conference on Design Automation, ETC - European Test Conference, EUROASIC - The European Event in ASIC Design, Proceedings, February 28, 1994

Flexware: A flexible firmware development environment for embedded systems.

Pierre G. Paulin, Clifford Liem, Trevor C. May, Shailesh Sutarwala

Proceedings of the Code Generation for Embedded Processors [Dagstuhl Workshop, Dagstuhl, Germany, August 31, 1994

Flexible modeling environment for embedded systems design.

Shailesh Sutarwala, Pierre G. Paulin

Proceedings of the Third International Workshop on Hardware/Software Codesign, 1994

1993

Insulin: An Instruction Set Simulation Environment.

Shailesh Sutarwala, Pierre G. Paulin, Yatish Kumar

Proceedings of the Computer Hardware Description Languages and their Applications, Proceedings of the 11th IFIP WG10.2 International Conference on Computer Hardware Description Languages and their Applications, 1993

1991

Meta VHDL for Higher Level Controller Modeling and Synthesis.

Ahmed Amine Jerraya, Pierre G. Paulin, Simon Curry

Proceedings of the VLSI 91, 1991

1989

Force-directed scheduling for the behavioral synthesis of ASICs.

Pierre G. Paulin, John P. Knight

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 1989

Algorithms for high-level synthesis.

Pierre G. Paulin, John P. Knight

IEEE Des. Test, 1989

Logic decomposition algorithms for the timing optimization of multi-level logic.

Pierre G. Paulin, Franck J. Poirot

Proceedings of the Computer Design: VLSI in Computers and Processors, 1989

Scheduling and Binding Algorithms for High-Level Synthesis.

Pierre G. Paulin, John P. Knight

Proceedings of the 26th ACM/IEEE Design Automation Conference, 1989

Horizontal Partitioning of PLA-based Finite State Machines.

Pierre G. Paulin

Proceedings of the 26th ACM/IEEE Design Automation Conference, 1989

1987

Force-Directed Scheduling in Automatic Data Path Synthesis.

Pierre G. Paulin, John P. Knight

Proceedings of the 24th ACM/IEEE Design Automation Conference. Miami Beach, FL, USA, June 28, 1987

1986

HAL: a multi-paradigm approach to automatic data path synthesis.

Pierre G. Paulin, John P. Knight, Emil F. Girczyc

Proceedings of the 23rd ACM/IEEE Design Automation Conference. Las Vegas, 1986