Pierre Boulet
Orcid: 0000-0002-0373-4478
According to our database1,
Pierre Boulet
authored at least 67 papers
between 1994 and 2024.
Collaborative distances:
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Bibliography
2024
Event-driven nearshore and shoreline coastline detection on SpiNNaker neuromorphic hardware.
Neuromorph. Comput. Eng., 2024
Neurocomputing, 2024
Proceedings of the International Conference on Neuromorphic Systems, 2024
2022
Concurr. Comput. Pract. Exp., 2022
Proceedings of the SIGCSE 2022: The 53rd ACM Technical Symposium on Computer Science Education, 2022
2021
VS2N : Interactive Dynamic Visualization and Analysis Tool for Spiking Neural Networks.
Proceedings of the 18th International Conference on Content-Based Multimedia Indexing, 2021
2020
Scalable Comput. Pract. Exp., 2020
Measurement-based methodology for modelling the energy consumption of mobile devices.
Int. J. Reason. based Intell. Syst., 2020
2019
The Parallel Multi-Mode Digraph Task Model for Energy-Aware Real-Time Heterogeneous Multi-Core Systems.
IEEE Trans. Computers, 2019
Unsupervised visual feature learning with spike-timing-dependent plasticity: How far are we from traditional feature learning approaches?
Pattern Recognit., 2019
Multi-layered Spiking Neural Network with Target Timestamp Threshold Adaptation and STDP.
Proceedings of the International Joint Conference on Neural Networks, 2019
Proceedings of the Handbook of Memristor Networks., 2019
2018
Parameter Exploration to Improve Performance of Memristor-Based Neuromorphic Architectures.
IEEE Trans. Multi Scale Comput. Syst., 2018
Proceedings of the 2018 International Joint Conference on Neural Networks, 2018
2017
CoRR, 2017
2016
Proceedings of the 24th International Conference on Real-Time Networks and Systems, 2016
Combining a volatile and nonvolatile memristor in artificial synapse to improve learning in Spiking Neural Networks.
Proceedings of the IEEE/ACM International Symposium on Nanoscale Architectures, 2016
2015
Progressive and explicit refinement of scheduling for multidimensional data-flow applications using UML MARTE.
Des. Autom. Embed. Syst., 2015
2014
Proceedings of the System Analysis and Modeling: Models and Reusability, 2014
2013
Heuristics for Routing and Spiral Run-time Task Mapping in NoC-based Heterogeneous MPSOCs.
CoRR, 2013
Proceedings of the 2013 IEEE Symposium on Visual Languages and Human Centric Computing, 2013
Proceedings of the Second Workshop on Graphical Modeling Language Development, 2013
2012
Expressing embedded systems configurations at high abstraction levels with UML MARTE profile: Advantages, limitations and alternatives.
J. Syst. Archit., 2012
Des. Autom. Embed. Syst., 2012
Proceedings of the 15th IEEE International Symposium on Object/Component/Service-Oriented Real-Time Distributed Computing, 2012
2011
Repetitive model refactoring strategy for the design space exploration of intensive signal processing applications.
J. Syst. Archit., 2011
Harnessing the Power of GPUs without Losing Abstractions in SAC and ArrayOL: A Comparative Study.
Proceedings of the 25th IEEE International Symposium on Parallel and Distributed Processing, 2011
2010
Array-OL with delays, a domain specific specification language for multidimensional intensive signal processing.
Multidimens. Syst. Signal Process., 2010
Proceedings of the 13th IEEE International Symposium on Object/Component/Service-Oriented Real-Time Distributed Computing, 2010
Architecture Exploration for Efficient Data Transfer and Storage in Data-Parallel Applications.
Proceedings of the Euro-Par 2010 - Parallel Processing, 16th International Euro-Par Conference, Ischia, Italy, August 31, 2010
Proceedings of the Design, Automation and Test in Europe, 2010
2009
Scalable Comput. Pract. Exp., 2009
2008
EURASIP J. Embed. Syst., 2008
High Level Loop Transformations for Systematic Signal Processing Embedded Applications.
Proceedings of the Embedded Computer Systems: Architectures, 2008
Proceedings of the 7th International Symposium on Parallel and Distributed Computing (ISPDC 2008), 2008
Proceedings of the 9th International Symposium on Parallel Architectures, 2008
2007
Multi-objective Mapping for NoC Architectures.
J. Digit. Inf. Manag., 2007
Proceedings of the Forum on specification and Design Languages, 2007
2006
Proceedings of the Forum on specification and Design Languages, 2006
2005
Proceedings of the Model Driven Engineering Languages and Systems, 2005
Model Driven Engineering for Regular MPSoC Co-design.
Proceedings of the 1st International Workshop on Reconfigurable Communication-centric Systems-on-Chip, 2005
Proceedings of the Parallel Processing and Applied Mathematics, 2005
Projection of the Array-OL Specification Language onto the Kahn Process Network Computation Model.
Proceedings of the 8th International Symposium on Parallel Architectures, 2005
Proceedings of the Hybrid Systems: Computation and Control, 8th International Workshop, 2005
Proceedings of the Forum on specification and Design Languages, 2005
2004
Proceedings of the Forum on specification and Design Languages, 2004
2003
Distributed Process Networks - Using Half FIFO Queues in CORBA.
Proceedings of the Parallel Computing: Software Technology, 2003
Proceedings of the Forum on specification and Design Languages, 2003
2002
Parallel Distributed Comput. Pract., 2002
Proceedings of the 2002 International Conference on Parallel Computing in Electrical Engineering (PARELEC 2002), 2002
Contributions aux environnements de programmation pour le calcul intensif. (Contributions to intensive computing programming environment).
, 2002
2001
Tech. Sci. Informatiques, 2001
Proceedings of the Ninth Euromicro Workshop on Parallel and Distributed Processing, 2001
2000
High Level Parallelization of a 3D Electromagnetic Simulation Code with Irregular Communication Patterns.
Proceedings of the Vector and Parallel Processing, 2000
Proceedings of the 2000 International Conference on Parallel Computing in Electrical Engineering (PARELEC 2000), 2000
1999
Parallel Process. Lett., 1999
1998
Parallel Comput., 1998
Proceedings of the Euro-Par '98 Parallel Processing, 1998
Proceedings of the 1998 International Conference on Parallel Architectures and Compilation Techniques, 1998
1997
Code generation in bouclettes.
Proceedings of the Fifth Euromicro Workshop on Parallel and Distributed Processing (PDP '97), 1997
1996
PhD thesis, 1996
Proceedings of the High-Performance Computing and Networking, 1996
Proceedings of the High-Performance Computing and Networking, 1996
1995
Evaluating Array Expressions On Massively Parallel Machines With Communication/ Computation Overlap.
Int. J. High Perform. Comput. Appl., 1995
1994