Pierre Bomel

According to our database, Pierre Bomel authored at least 30 papers between 2004 and 2018.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of four.

2018

Bi-Objective Cost Function for Adaptive Routing in Network-on-Chip.

Asma Benmessaoud Gabis, Pierre Bomel, Marc Sevaux

IEEE Trans. Multi Scale Comput. Syst., 2018

Application-aware Multi-Objective Routing based on Genetic Algorithm for 2D Network-on-Chip.

Asma Benmessaoud Gabis, Pierre Bomel, Marc Sevaux

Microprocess. Microsystems, 2018

2017

Bit-accurate energy estimation for Networks-on-Chip.

Erwan Moreac, André Rossi, Johann Laurent, Pierre Bomel

J. Syst. Archit., 2017

Energy Savings in Networks-on-Chip with Smart Temporal Shielding.

Erwan Moreac, Pierre Bomel, Johann Laurent, André Rossi

J. Low Power Electron., 2017

Energy aware Networks-on-Chip cortex inspired communication.

Erwan Moreac, Johann Laurent, Pierre Bomel, André Rossi, Emmanuel Boutillon, Maurizio Palesi

Proceedings of the 27th International Symposium on Power and Timing Modeling, 2017

2016

Heuristic Based Routing Algorithm for Network on Chip.

Asma Benmessaoud Gabis, Marc Sevaux, Pierre Bomel, Mouloud Koudil, Karima Benatchba

Proceedings of the 10th IEEE International Symposium on Embedded Multicore/Many-core Systems-on-Chip, 2016

Crosstalk-aware link power model for Networks-on-Chip.

Erwan Moreac, André Rossi, Johann Laurent, Pierre Bomel

Proceedings of the 2016 Conference on Design and Architectures for Signal and Image Processing (DASIP), 2016

2014

Virtual Devices for Hot-Pluggable Processors.

Pierre Bomel, Kevin J. M. Martin, Jean-Philippe Diguet

Proceedings of the 17th Euromicro Conference on Digital System Design, 2014

Orcc's compa-backend demonstration.

Yaset Oliva, Emmanuel Casseau, Kevin J. M. Martin, Pierre Bomel, Jean-Philippe Diguet, Hervé Yviquel, Mickaël Raulet, Erwan Raffin, Laurent Morin

Proceedings of the 2014 Conference on Design and Architectures for Signal and Image Processing, 2014

2013

Virtual UARTs for Reconfigurable Multi-processor Architectures.

Pierre Bomel, Kevin J. M. Martin, Jean-Philippe Diguet

Proceedings of the 2013 IEEE International Symposium on Parallel & Distributed Processing, 2013

Parallel Deadlock Detection and Recovery for Networks-on-Chip Dedicated to Diffused Computations.

Pierre Bomel, Marc Sevaux

Proceedings of the 2013 Euromicro Conference on Digital System Design, 2013

2012

Functional validation of AADL models via model transformation to SystemC with ATL.

Pierre Bomel, Dominique Blouin, Mickael Lanoe, Eric Senn

Proceedings of the 5th International Workshop on Model Based Architecting and Construction of Embedded Systems, 2012

2010

Hardware Discrete Channel Emulator.

Emmanuel Boutillon, Yangyang Tang, Cédric Marchand, Pierre Bomel

Proceedings of the 2010 International Conference on High Performance Computing & Simulation, 2010

Self-reconfigurable Embedded Systems: From Modeling to Implementation.

Guy Gogniat, Jorgiano Vidal, Linfeng Ye, Jérémie Crenne, Sébastien Guillet, Florent de Lamotte, Jean-Philippe Diguet, Pierre Bomel

Proceedings of the 2010 International Conference on Engineering of Reconfigurable Systems & Algorithms, 2010

2009

Networked Self-adaptive Systems: An Opportunity for Configuring in the Large.

Jean-Philippe Diguet, Linfeng Ye, Yvan Eustache, Jérémie Crenne, Pierre Bomel, Guy Gogniat, Jorgiano Vidal, Florent de Lamotte

Proceedings of the 2009 International Conference on Engineering of Reconfigurable Systems & Algorithms, 2009

Ultra-Fast Downloading of Partial Bitstreams through Ethernet.

Pierre Bomel, Jérémie Crenne, Linfeng Ye, Jean-Philippe Diguet, Guy Gogniat

Proceedings of the Architecture of Computing Systems, 2009

2008

A Priori Implementation Effort Estimation for Hardware Design Based on Independent Path Analysis.

Rasmus Abildgren, Jean-Philippe Diguet, Pierre Bomel, Guy Gogniat, Peter Koch, Yannick Le Moullec

EURASIP J. Embed. Syst., 2008

Bitstreams Repository Hierarchy for FPGA Partially Reconfigurable Systems.

Pierre Bomel, Jean-Philippe Diguet, Guy Gogniat, Jérémie Crenne

Proceedings of the 7th International Symposium on Parallel and Distributed Computing (ISPDC 2008), 2008

A Networked, Lightweight and Partially Reconfigurable Platform.

Pierre Bomel, Guy Gogniat, Jean-Philippe Diguet

Proceedings of the Reconfigurable Computing: Architectures, 2008

2007

Constrained algorithmic IP design for system-on-chip.

Philippe Coussy, Emmanuel Casseau, Pierre Bomel, Adel Baganne, Eric Martin

Integr., 2007

2006

A formal method for hardware IP design and integration under I/O and timing constraints.

Philippe Coussy, Emmanuel Casseau, Pierre Bomel, Adel Baganne, Eric Martin

ACM Trans. Embed. Comput. Syst., 2006

Synthèse Comportementale Sous Contraintes de Communication et de Placement Mémoire pour les composants du TDSI

Gwenolé Corre, Philippe Coussy, Pierre Bomel, Eric Senn, Eric Martin

CoRR, 2006

2005

DVB-DSNG Modem High Level Synthesis in an Optimized Latency Insensitive System Context.

Pierre Bomel, Nabil Abdelli, Eric Martin, Anne-Marie Fouilliart, Emmanuel Boutillon, Philippe Kajfasz

Proceedings of the Embedded Computer Systems: Architectures, 2005

High-level synthesis under I/O timing and memory constraints.

Philippe Coussy, Gwenolé Corre, Eric Senn, Pierre Bomel, Eric Martin

Proceedings of the International Symposium on Circuits and Systems (ISCAS 2005), 2005

A more efficient and flexible DSP design flow from Matlab-Simulink [FFT algorithm example].

Philippe Coussy, Gwenolé Corre, Pierre Bomel, Eric Senn, Eric Martin

Proceedings of the 2005 IEEE International Conference on Acoustics, 2005

C-based rapid prototyping for digital signal processing.

Emmanuel Casseau, Bertrand Le Gal, Pierre Bomel, Christophe Jégo, Sylvain Huet, Eric Martin

Proceedings of the 13th European Signal Processing Conference, 2005

High-Level Synthesis in Latency Insensitive System Methodology.

Pierre Bomel, Nabil Abdelli, Eric Martin, Anne-Marie Fouilliart, Emmanuel Boutillon, Philippe Kajfasz

Proceedings of the Eighth Euromicro Symposium on Digital Systems Design (DSD 2005), 30 August, 2005

Hardware Virtual Components Compliant with Communication System Standards.

Nabil Abdelli, Pierre Bomel, Emmanuel Casseau, Anne-Marie Fouilliart, Christophe Jégo, Philippe Kajfasz, Bertrand Le Gal, Nathalie Le Heno

Proceedings of the Eighth Euromicro Symposium on Digital Systems Design (DSD 2005), 30 August, 2005

Synchronization Processor Synthesis for Latency Insensitive Systems.

Pierre Bomel, Eric Martin, Emmanuel Boutillon

Proceedings of the 2005 Design, 2005

2004

Memory accesses management during high level synthesis.

Gwenolé Corre, Eric Senn, Pierre Bomel, Nathalie Julien, Eric Martin

Proceedings of the 2nd IEEE/ACM/IFIP International Conference on Hardware/Software Codesign and System Synthesis, 2004