Pierre Abillama
Orcid: 0000-0001-9523-6152
According to our database1,
Pierre Abillama
authored at least 9 papers
between 2020 and 2024.
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Bibliography
2024
AIMMI: Audio and Image Multi-Modal Intelligence via a Low-Power SoC With 2-MByte On-Chip MRAM for IoT Devices.
IEEE J. Solid State Circuits, October, 2024
RoboVisio: A Micro-Robot Vision Domain-Specific SoC for Autonomous Navigation Enabling Fully-on-Chip Intelligence via 2-MB eMRAM.
IEEE J. Solid State Circuits, August, 2024
2023
An 8.09TOPS/W Neural Engine Leveraging Bit-Sparsified Sign-Magnitude Multiplications and Dual Adder Trees.
Proceedings of the IEEE International Solid- State Circuits Conference, 2023
TaskFusion: An Efficient Transfer Learning Architecture with Dual Delta Sparsity for Multi-Task Natural Language Processing.
Proceedings of the 50th Annual International Symposium on Computer Architecture, 2023
SONA: An Accelerator for Transform-Domain Neural Networks with Sparse-Orthogonal Weights.
Proceedings of the 34th IEEE International Conference on Application-specific Systems, 2023
2022
Approximate Constant-Coefficient Multiplication Using Hybrid Binary-Unary Computing for FPGAs.
ACM Trans. Reconfigurable Technol. Syst., 2022
2021
HTNN: Deep Learning in Heterogeneous Transform Domains with Sparse-Orthogonal Weights.
Proceedings of the IEEE/ACM International Symposium on Low Power Electronics and Design, 2021
2020
Proceedings of the IEEE International Symposium on Circuits and Systems, 2020
Low-Cost Approximate Constant Coefficient Hybrid Binary-Unary Multiplier for DSP Applications.
Proceedings of the 28th IEEE Annual International Symposium on Field-Programmable Custom Computing Machines, 2020