Pierangelo Confalonieri

According to our database1, Pierangelo Confalonieri authored at least 9 papers between 1989 and 2012.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of five.

Timeline

Legend:

Book 
In proceedings 
Article 
PhD thesis 
Dataset
Other 

Links

On csauthors.net:

Bibliography

2012
A 10-b 100-kS/s 1-mW General-Purpose ADC for Cellular Telephones.
IEEE Trans. Circuits Syst. II Express Briefs, 2012

2011
1.05V 10.2mW WCDMA analog baseband in 65nm digital CMOS technology.
Proceedings of the 18th IEEE International Conference on Electronics, Circuits and Systems, 2011

2004
A 2.7mW 1MSps 10b analog-to-digital converter with built-in reference buffer and 1LSB accuracy programmable input ranges.
Proceedings of the 33rd European Solid-State Circuits Conference, 2004

2000
A 2.7-V 11.8-mW baseband ADC with 72-dB dynamic range for GSM applications.
IEEE J. Solid State Circuits, 2000

1998
A high-performance analog front-end 14-bit codec for 2.7-V digital cellular phones.
IEEE J. Solid State Circuits, 1998

1997
Low-voltage double-sampled ΣΔ converters.
IEEE J. Solid State Circuits, 1997

1996
A -80 dB THD, 4 V<sub>pp</sub> switched capacitor filter for 1.5 V battery-operated systems.
IEEE J. Solid State Circuits, 1996

1994
A 5-V CMOS programmable acoustic front-end for ISDN terminals and digital telephone sets.
IEEE J. Solid State Circuits, September, 1994

1989
A fully differential sample-and-hold circuit for high-speed applications.
IEEE J. Solid State Circuits, October, 1989


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