Pier Luigi Rolandi

According to our database, Pier Luigi Rolandi authored at least 20 papers between 1995 and 2024.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of four.

2024

Designing Circuits for AiMC Based on Non-Volatile Memories: A Tutorial Brief on Trade-Off and Strategies for ADCs and DACs Co-Design.

Riccardo Vignali, Riccardo Zurla, Marco Pasotti, Pier Luigi Rolandi, Abhairaj Singh, Manuel Le Gallo, Abu Sebastian, Taekwang Jang, Alessio Antolini, Eleonora Franchi Scarselli, Alessandro Cabrini

IEEE Trans. Circuits Syst. II Express Briefs, March, 2024

Drift Compensation in Multilevel PCM for in-Memory Computing Accelerators.

L. Pistolesi, Artem Glukhov, Amadeo de Gracia Herranz, M. Lopez-Vallejo, Marcella Carissimi, Marco Pasotti, Pier Luigi Rolandi, Andrea Redaelli, I. Muñoz-Martín, S. Bianchi, Andrea Bonfanti, Daniele Ielmini

Proceedings of the IEEE International Reliability Physics Symposium, 2024

2009

System on chip with 1.12mW-32Gb/s AC-coupled 3D memory interface.

Roberto Canegallo, Luca Perugini, Alberto Pasini, Massimiliano Innocenti, Mauro Scandiuzzo, Roberto Guerrieri, Pier Luigi Rolandi

Proceedings of the IEEE Custom Integrated Circuits Conference, 2009

2008

3-D Capacitive Interconnections With Mono- and Bi-Directional Capabilities.

Alberto Fazzi, Roberto Canegallo, Luca Ciccarelli, Luca Magagni, Federico Natali, Erik Jung, Pier Luigi Rolandi, Roberto Guerrieri

IEEE J. Solid State Circuits, 2008

2007

A 1.2-to-8V Charge-Pump with Improved Power Efficiency for Non-Volatille Memories.

Anna Richelli, Luca Mensi, Luigi Colalongo, Pier Luigi Rolandi, Zsolt Miklós Kovács-Vajna

Proceedings of the 2007 IEEE International Solid-State Circuits Conference, 2007

3D Capacitive Interconnections with Mono- and Bi-Directional Capabilities.

Alberto Fazzi, Roberto Canegallo, Luca Ciccarelli, Luca Magagni, Federico Natali, Erik Jung, Pier Luigi Rolandi, Roberto Guerrieri

Proceedings of the 2007 IEEE International Solid-State Circuits Conference, 2007

A 1.2V-5V High Efficiency CMOS Charge Pump for Non-Volatile Memories.

Anna Richelli, Luca Mensi, Luigi Colalongo, Zsolt Miklós Kovács-Vajna, Pier Luigi Rolandi

Proceedings of the International Symposium on Circuits and Systems (ISCAS 2007), 2007

A dynamically adaptive DSP for heterogeneous reconfigurable platforms.

Fabio Campi, Antonio Deledda, Matteo Pizzotti, Luca Ciccarelli, Pier Luigi Rolandi, Claudio Mucci, Andrea Lodi, Arseni Vitkovski, Luca Vanzolini

Proceedings of the 2007 Design, Automation and Test in Europe Conference and Exposition, 2007

3D Capacitive Interconnections for High Speed Interchip Communication.

Roberto Canegallo, Alberto Fazzi, Luca Ciccarelli, Luca Magagni, Federico Natali, Pier Luigi Rolandi, Erik Jung, Léa Di Cioccio, Roberto Guerrieri

Proceedings of the IEEE 2007 Custom Integrated Circuits Conference, 2007

2006

Yield prediction for 3D capacitive interconnections.

Alberto Fazzi, Luca Magagni, Mario de Dominicis, Paolo Zoffoli, Roberto Canegallo, Pier Luigi Rolandi, Alberto L. Sangiovanni-Vincentelli, Roberto Guerrieri

Proceedings of the 2006 International Conference on Computer-Aided Design, 2006

A Low-Power Routing Architecture Optimized for Deep Sub-Micron FPGAs.

Luca Ciccarelli, Domenico Loparco, Massimiliano Innocenti, Andrea Lodi, Claudio Mucci, Pier Luigi Rolandi

Proceedings of the IEEE 2006 Custom Integrated Circuits Conference, 2006

2003

Power efficient charge pump in deep submicron standard CMOS technology.

Roberto Pelliconi, David Iezzi, Andrea Baroni, Marco Pasotti, Pier Luigi Rolandi

IEEE J. Solid State Circuits, 2003

A high compliance CMOS current source for low voltage applications.

Michele Quarantelli, Marco Poles, Marco Pasotti, Pier Luigi Rolandi

Proceedings of the 2003 International Symposium on Circuits and Systems, 2003

A reconfigurable signal processing IC with embedded FPGA and multi-port flash memory.

Michele Borgatti, Lorenzo Cali, Guido De Sandre, Benoit Forêt, David Iezzi, Francesco Lertora, Gilberto Muzzi, Marco Pasotti, Marco Poles, Pier Luigi Rolandi

Proceedings of the 40th Design Automation Conference, 2003

2001

A 64-min single-chip voice recorder/player using embedded 4-b/cell flash memory.

Michele Borgatti, Alessandro Rocchi, Marco Bisio, Monica Besana, Loris Navoni, Pier Luigi Rolandi

IEEE J. Solid State Circuits, 2001

2000

A 64 min single-chip voice recorder/player using embedded 4 bit/cell flash memory.

Michele Borgatti, Alessandro Rocchi, Marco Bisio, Monica Besana, Loris Navoni, Pier Luigi Rolandi

Proceedings of the IEEE 2000 Custom Integrated Circuits Conference, 2000

1999

An analog associative memory chip for VQ image compression.

Loris Navoni, Monica Besana, Pier Luigi Rolandi

Proceedings of the 1999 IEEE International Conference on Acoustics, 1999

Analog sense amplifiers for high density NOR flash memories.

Marco Pasotti, Pier Luigi Rolandi, Roberto Canegallo, Danilo Gerna, Giovanni Guaitini, Frank Lhermet, Alan Kramer

Proceedings of the IEEE 1999 Custom Integrated Circuits Conference, 1999

1997

Words Recognition using Associative Memory.

Loris Navoni, Roberto Canegallo, Mauro Chinosi, Giovanni Gozzini, Alan Kramer, Pier Luigi Rolandi

Proceedings of the 4th International Conference Document Analysis and Recognition (ICDAR '97), 1997

1995

Ultra-low-power analog associative memory core using flash-EEPROM-based programmable capacitors.

Alan Kramer, Roberto Canegallo, Mauro Chinosi, D. Doise, Giovanni Gozzini, Pier Luigi Rolandi, Marco Sabatini, P. Zabberoni

Proceedings of the 1995 International Symposium on Low Power Design 1995, 1995