Philippos Papaphilippou

Orcid: 0000-0002-7452-7150

According to our database1, Philippos Papaphilippou authored at least 23 papers between 2018 and 2024.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

Legend:

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PhD thesis 
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Online presence:

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Bibliography

2024
Efficient Deadlock Avoidance for 2-D Mesh NoCs That Use OQ or VOQ Routers.
IEEE Trans. Computers, May, 2024

Revisiting 3D Cartesian Scatterplots with a Novel Plotting Framework and a Survey.
CoRR, 2024

Efficient Adaptable Streaming Aggregation Engine.
CoRR, 2024

2023
Experimental Survey of FPGA-Based Monolithic Switches and a Novel Queue Balancer.
IEEE Trans. Parallel Distributed Syst., May, 2023

Efficient deadlock avoidance in 2D mesh NoCs that use OQ or VOQ routers.
CoRR, 2023

Efficiently Removing Sparsity for High-Throughput Stream Processing.
Proceedings of the International Conference on Field Programmable Technology, 2023

2022
Hipernetch: High-Performance FPGA Network Switch.
ACM Trans. Reconfigurable Technol. Syst., 2022

FLiMS: A Fast Lightweight 2-Way Merger for Sorting.
IEEE Trans. Computers, 2022

FPGA-extended Modified Harvard Architecture.
CoRR, 2022

FPGA-Extended General Purpose Computer Architecture.
Proceedings of the Applied Reconfigurable Computing. Architectures, Tools, and Applications, 2022

2021
FLiMS: a Fast Lightweight 2-way Merge Sorter.
CoRR, 2021

Extending the RISC-V ISA for exploring advanced reconfigurable SIMD instructions.
CoRR, 2021

Efficient Queue-Balancing Switch for FPGAs.
Proceedings of the International Conference on Field-Programmable Technology, 2021

Simodense: a RISC-V softcore optimised for exploring custom SIMD instructions.
Proceedings of the 31st International Conference on Field-Programmable Logic and Applications, 2021

Demonstrating custom SIMD instruction development for a RISC-V softcore.
Proceedings of the 31st International Conference on Field-Programmable Logic and Applications, 2021

2020
An Adaptable High-Throughput FPGA Merge Sorter for Accelerating Database Analytics.
Proceedings of the 30th International Conference on Field-Programmable Logic and Applications, 2020

High-Performance FPGA Network Switch Architecture.
Proceedings of the FPGA '20: The 2020 ACM/SIGDA International Symposium on Field-Programmable Gate Arrays, 2020

2019
Accelerating Hybrid Monte Carlo simulations of the Hubbard model on the hexagonal lattice.
Comput. Phys. Commun., 2019

Pangloss: a novel Markov chain prefetcher.
CoRR, 2019

Accelerating the Merge Phase of Sort-Merge Join.
Proceedings of the 29th International Conference on Field Programmable Logic and Applications, 2019

2018
Performance tuning for deep learning on a many-core processor (master thesis).
CoRR, 2018

FLiMS: Fast Lightweight Merge Sorter.
Proceedings of the International Conference on Field-Programmable Technology, 2018

Accelerating Database Systems Using FPGAs: A Survey.
Proceedings of the 28th International Conference on Field Programmable Logic and Applications, 2018


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