Philippe Manet

According to our database1, Philippe Manet authored at least 10 papers between 2005 and 2010.

Collaborative distances:

Timeline

Legend:

Book 
In proceedings 
Article 
PhD thesis 
Dataset
Other 

Links

On csauthors.net:

Bibliography

2010
A tile-based processor architecture model for high-efficiency embedded homogeneous multicore platforms.
PhD thesis, 2010

A methodology for precise comparisons of processor core architectures for homogeneous many-core DSP platforms.
Proceedings of the 2010 Conference on Design & Architectures for Signal & Image Processing, 2010

2008
An Evaluation of Dynamic Partial Reconfiguration for Signal and Image Processing in Professional Electronics Applications.
EURASIP J. Embed. Syst., 2008

2007
NoC Implementation in FPGA Using Torus Topology.
Proceedings of the FPL 2007, 2007

Enabling certification for dynamic partial reconfiguration using a minimal flow.
Proceedings of the 2007 Design, Automation and Test in Europe Conference and Exposition, 2007

Interactive presentation: RECOPS: reconfiguring programmable devices for military hardware electronics.
Proceedings of the 2007 Design, Automation and Test in Europe Conference and Exposition, 2007

By-passing the out-of-order execution pipeline to increase energy-efficiency.
Proceedings of the 4th Conference on Computing Frontiers, 2007

2006
Low Power Techniques Applied to a 80C51 Microcontroller for High Temperature Applications.
J. Low Power Electron., 2006

Application-specific reconfigurable XOR-indexing to eliminate cache conflict misses.
Proceedings of the Conference on Design, Automation and Test in Europe, 2006

2005
Low Power Techniques Applied to a 80C51 Microcontroller for High Temperature Applications.
Proceedings of the Integrated Circuit and System Design, 2005


  Loading...