Philippe Magarshack

According to our database, Philippe Magarshack authored at least 21 papers between 2001 and 2015.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of four.

2015

Breakthrough technologies and reference designs for new IoT applications.

Philippe Magarshack

Proceedings of the Symposium on VLSI Circuits, 2015

2014

A 3 GHz Dual Core Processor ARM Cortex TM -A9 in 28 nm UTBB FD-SOI CMOS With Ultra-Wide Voltage Range and Energy Efficiency Optimization.

David Jacquet, Frederic Hasbani, Philippe Flatresse, Robin Wilson, Franck Arnaud, Giorgio Cesana, Thierry Di Gilio, Christophe Lecocq, Tanmoy Roy, Amit Chhabra, Chiranjeev Grover, Olivier Minez, Jacky Uginet, Guy Durieu, Cyril Adobati, Davide Casalotto, Frederic Nyer, Patrick Menut, Andreia Cathelin, Indavong Vongsavady, Philippe Magarshack

IEEE J. Solid State Circuits, 2014

27.1 A 460MHz at 397mV, 2.6GHz at 1.3V, 32b VLIW DSP, embedding FMAX tracking.

Robin Wilson, Edith Beigné, Philippe Flatresse, Alexandre Valentian, Fady Abouzeid, Thomas Benoist, Christian Bernard, Sebastien Bernard, Olivier Billoint, Sylvain Clerc, Bastien Giraud, Anuj Grover, Julien Le Coz, Ivan Miro Panades, Jean-Philippe Noël, Bertrand Pelloux-Prayer, Philippe Roche, Olivier Thomas, Yvain Thonnart, David Turgis, Fabien Clermidy, Philippe Magarshack

Proceedings of the 2014 IEEE International Conference on Solid-State Circuits Conference, 2014

Panel: Emerging vs. established technologies, a two sphinxes' riddle at the crossroads?

Marco Casale-Rossi, Giovanni De Micheli, Rob Aitken, Antun Domic, Manfred Horstmann, Robert Hum, Philippe Magarshack

Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2014

2013

UTBB FD-SOI: a process/design symbiosis for breakthrough energy-efficiency.

Philippe Magarshack, Philippe Flatresse, Giorgio Cesana

Proceedings of the Design, Automation and Test in Europe, 2013

2012

Gaining 10x in energy efficiency in the next decade in consumer products.

Philippe Magarshack, Andreia Cathelin

Proceedings of Technical Program of 2012 VLSI Design, Automation and Test, 2012

2011

Beyond the horizon: The next 10x reduction in power - Challenges and solutions.

Jan M. Rabaey, Hugo De Man, Mark Horowitz, Takayasu Sakurai, Jack Sun, Dan Dobberpuhl, Kiyoo Itoh, Philippe Magarshack, Asad A. Abidi, Hermann Eul

Proceedings of the IEEE International Solid-State Circuits Conference, 2011

2010

3-D stacked die: now or future?

Samta Bansal, Juan C. Rey, Andrew Yang, Myung-Soo Jang, L. C. Lu, Philippe Magarshack, Pol Marchal, Riko Radojcic

Proceedings of the 47th Design Automation Conference, 2010

2009

Low-Power Design Solutions forWireless Multimedia SoCs.

Jean-Pierre Schoellkopf, Philippe Magarshack

IEEE Des. Test Comput., 2009

2007

Design challenges in 45nm and below: DFM, low-power and design for reliability.

Philippe Magarshack

Proceedings of the 17th ACM Great Lakes Symposium on VLSI 2007, 2007

DFM/DFY: should you trust the surgeon or the family doctor?

Marco Casale-Rossi, Andrzej J. Strojwas, Robert C. Aitken, Antun Domic, Carlo Guardiani, Philippe Magarshack, Douglas Pattullo, Joseph Sawicki

Proceedings of the 2007 Design, Automation and Test in Europe Conference and Exposition, 2007

2006

"The IC nanometer race -- what will it take to win?".

Gadi Singer, Philippe Magarshack, Dennis Buss, Fu-Chieh Hsu, Ho-Kyu Kang

Proceedings of the 43rd Design Automation Conference, 2006

2004

Guest Editors' Introduction: Design for Yield and Reliability.

Yervant Zorian, Dimitris Gizopoulos, Cary Vandenberg, Philippe Magarshack

IEEE Des. Test Comput., 2004

2003

Invited Keynote: Building Yield into Systems-on-Chips for Nanometer Technologies.

Philippe Magarshack

Proceedings of the 21st IEEE VLSI Test Symposium (VTS 2003), 27 April, 2003

System-on-chip beyond the nanometer wall.

Philippe Magarshack, Pierre G. Paulin

Proceedings of the 40th Design Automation Conference, 2003

Fast, cheap and under control: the next implementation fabric.

Abbas El Gamal, Ivo Bolsens, Andy Broom, Christopher Hamlin, Philippe Magarshack, Zvi Or-Bach, Lawrence T. Pileggi

Proceedings of the 40th Design Automation Conference, 2003

2002

Improving SoC Design Quality through a Reproducible Design Flow.

Philippe Magarshack

IEEE Des. Test Comput., 2002

SoC's Trends and Challenges going to 0.10µm.

Philippe Magarshack

Proceedings of the 10th IEEE International Workshop on Memory Technology, 2002

Systems-on-chip needs for embedded software development: an industrial perspective.

Philippe Magarshack

Proceedings of the 2002 Joint Conference on Languages, 2002

2001

Quality of SoC Designs through Quality of the Design Flow: Status and Needs.

Philippe Magarshack

Proceedings of the 2nd International Symposium on Quality of Electronic Design (ISQED 2001), 2001

Panel: When Will the Analog Design Flow Catch Up with Digital Methodology?

Georges G. E. Gielen, Mike Sottak, Mike Murray, Linda Kaye, Maria del Mar Hershenson, Kenneth S. Kundert, Philippe Magarshack, Akria Matsuzawa, Ronald A. Rohrer, Ping Yang

Proceedings of the 38th Design Automation Conference, 2001