Philip Quinlan
According to our database1,
Philip Quinlan
authored at least 13 papers
between 2004 and 2022.
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Collaborative distances:
Timeline
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Book In proceedings Article PhD thesis Dataset OtherLinks
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Bibliography
2022
A Compact 0.2-0.3-V Inverse-Class-F<sub>23</sub> Oscillator for Low 1/f<sup>3</sup> Noise Over Wide Tuning Range.
IEEE J. Solid State Circuits, 2022
2021
IEEE Trans. Circuits Syst. I Regul. Pap., 2021
2.4-GHz Highly Selective IoT Receiver Front End With Power Optimized LNTA, Frequency Divider, and Baseband Analog FIR Filter.
IEEE J. Solid State Circuits, 2021
2020
Low-Power Highly Selective Channel Filtering Using a Transconductor-Capacitor Analog FIR.
IEEE J. Solid State Circuits, 2020
30.4 A 370µW 5.5dB-NF BLE/BT5.0/IEEE 802.15.4-Compliant Receiver with >63dB Adjacent Channel Rejection at >2 Channels Offset in 22nm FDSOI.
Proceedings of the 2020 IEEE International Solid- State Circuits Conference, 2020
2019
A 0.06-3.4-MHz 92-μW Analog FIR Channel Selection Filter With Very Sharp Transition Band for IoT Receivers.
Proceedings of the 45th IEEE European Solid State Circuits Conference, 2019
2018
IEEE Trans. Circuits Syst. II Express Briefs, 2018
2016
26.4 A 160-to-960MHz ETSI class-1-compliant IoE transceiver with 100dB blocker rejection, 70dB ACR and 800pA standby current.
Proceedings of the 2016 IEEE International Solid-State Circuits Conference, 2016
2009
IEEE Commun. Mag., 2009
A 2.4GHz 2Mb/s versatile PLL-based transmitter using digital pre-emphasis and auto calibration in 0.18µm CMOS for WPAN.
Proceedings of the IEEE International Solid-State Circuits Conference, 2009
A highly integrated low-power 2.4GHz transceiver using a direct-conversion diversity receiver in 0.18µm CMOS for IEEE802.15.4 WPAN.
Proceedings of the IEEE International Solid-State Circuits Conference, 2009
2004
IEEE J. Solid State Circuits, 2004