Philip H. Sweany

According to our database, Philip H. Sweany authored at least 27 papers between 1987 and 2014.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of four.

2014

Debugging teacher certification (abstract only).

Jian Zhang, Philip H. Sweany

Proceedings of the 45th ACM Technical Symposium on Computer Science Education, 2014

2008

FPGA implementations of elliptic curve cryptography and Tate pairing over a binary field.

Hao Li, Jian Huang, Philip H. Sweany, Dijiang Huang

J. Syst. Archit., 2008

2007

Feasibility of decoupling memory management from the execution pipeline.

Wentong Li, Mehran Rezaei, Krishna M. Kavi, Afrin Naz, Philip H. Sweany

J. Syst. Archit., 2007

An FPGA implementation of elliptic curve cryptography for future secure web transaction.

Jian Huang, Hao Li, Philip H. Sweany

Proceedings of the ISCA 20th International Conference on Parallel and Distributed Computing Systems, 2007

2006

Tiny split data-caches make big performance impact for embedded applications.

Afrin Naz, Krishna M. Kavi, Wentong Li, Philip H. Sweany

J. Embed. Comput., 2006

A Study of Reconfigurable Split Data Caches and Instruction Caches.

Afrin Naz, Krishna M. Kavi, Philip H. Sweany, Wentong Li

Proceedings of the ISCA 19th International Conference on Parallel and Distributed Computing Systems, 2006

Speculative Thread Execution in a Multithreaded Dataflow Architecture.

Wentong Li, Krishna M. Kavi, Afrin Naz, Philip H. Sweany

Proceedings of the ISCA 19th International Conference on Parallel and Distributed Computing Systems, 2006

2005

Improving data cache performance with integrated use of split caches, victim cache and stream buffers.

Afrin Naz, Mehran Rezaei, Krishna M. Kavi, Philip H. Sweany

SIGARCH Comput. Archit. News, 2005

2004

A Study of Separate Array and Scalar Caches.

Afrin Naz, Krishna M. Kavi, Philip H. Sweany, Mehran Rezaei

Proceedings of the 18th Annual Symposium on High Performance Computing Systems and Applications, 2004

Automatic data partitioning for the agere payload plus network processor.

Steve Carr, Philip H. Sweany

Proceedings of the 2004 International Conference on Compilers, 2004

2003

An experimental evaluation of scalar replacement on scientific benchmarks.

Steve Carr, Philip H. Sweany

Softw. Pract. Exp., 2003

2002

Loop fusion for clustered VLIW architectures.

Yi Qian, Steve Carr, Philip H. Sweany

Proceedings of the 2002 Joint Conference on Languages, 2002

Optimizing Loop Performance for Clustered VLIW Architectures.

Yi Qian, Steve Carr, Philip H. Sweany

Proceedings of the 2002 International Conference on Parallel Architectures and Compilation Techniques (PACT 2002), 2002

2001

Loop Transformations for Architectures with Partitioned Register Banks.

Xianglong Huang, Steve Carr, Philip H. Sweany

Proceedings of the 2001 ACM SIGPLAN Workshop on Optimization of Middleware and Distributed Systems, 2001

2000

Register Assignment for Software Pipelining with Partitioned Register Banks.

Jason Hiser, Steve Carr, Philip H. Sweany, Steven J. Beaty

Proceedings of the 14th International Parallel & Distributed Processing Symposium (IPDPS'00), 2000

Global Register Partitioning.

Jason Hiser, Steve Carr, Philip H. Sweany

Proceedings of the 2000 International Conference on Parallel Architectures and Compilation Techniques (PACT'00), 2000

1999

Improving software pipelining with hardware support for self-spatial loads.

Steve Carr, Philip H. Sweany

SIGARCH Comput. Archit. News, 1999

1998

Building a Retargetable Local Instruction Scheduler.

Vicki H. Allan, Steven J. Beaty, Bogong Su, Philip H. Sweany

Softw. Pract. Exp., 1998

Compiler Optimization for Superscalar Systems: Global Instruction Scheduling without Copies.

Philip H. Sweany, Steve Carr, Brett L. Huber

Digit. Tech. J., 1998

1997

Modulo Scheduling with Cache Reuse Information.

Chen Ding, Steve Carr, Philip H. Sweany

Proceedings of the Euro-Par '97 Parallel Processing, 1997

1996

Improving Software Pipelining with Unroll-and-Jam.

Steve Carr, Chen Ding, Philip H. Sweany

Proceedings of the 29th Annual Hawaii International Conference on System Sciences (HICSS-29), 1996

Extending List Scheduling to Consider Execution Frequency.

Michael J. Bourke III, Philip H. Sweany, Steven J. Beaty

Proceedings of the 29th Annual Hawaii International Conference on System Sciences (HICSS-29), 1996

1995

CRAIG: a practical framework for combining instruction scheduling and register assignment.

Thomas S. Brasier, Philip H. Sweany, Steven J. Beaty, Steve Carr

Proceedings of the IFIP WG10.3 working conference on Parallel architectures and compilation techniques, 1995

1992

Dominator-path scheduling: a global scheduling method.

Philip H. Sweany, Steven J. Beaty

Proceedings of the 25th Annual International Symposium on Microarchitecture, 1992

1990

Post-compaction register assignment in a retargetable compiler.

Philip H. Sweany, Steven J. Beaty

Proceedings of the 23rd Annual Workshop and Symposium on Microprogramming and Microarchitecture, 1990

1988

Horizon: A Retargetable Compiler for Horizontal Microarchitectures.

Robert A. Mueller, Michael R. Duda, Philip H. Sweany, Jack S. Walicki

IEEE Trans. Software Eng., 1988

1987

Trace scheduling optimization in a retargetable microcode compiler.

Michael A. Howland, Robert A. Mueller, Philip H. Sweany

Proceedings of the 20st Annual Workshop and Symposium on Microprogramming and Microarchitecture, 1987