Phani Tangellapalli

According to our database, Phani Tangellapalli authored at least 3 papers between 2012 and 2017.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of four.

2017

Area efficient soft error tolerant RISC pipeline: Leveraging data encoding and inherent ALU redundancy.

Syed Rafay Hasan, Phani Tangellapalli

Proceedings of the IEEE 60th International Midwest Symposium on Circuits and Systems, 2017

2013

Soft error aware pipelined architecture: Leveraging automatic repeat request protocol.

Phani Balaji Swamy Tangellapalli, Syed Rafay Hasan

Proceedings of the IEEE 56th International Midwest Symposium on Circuits and Systems, 2013

2012

Towards low area overhead ARQ based soft error tolerant data paths for SRAM-based Altera FPGAs.

Phani Balaji Swamy Tangellapalli, Syed Rafay Hasan

Proceedings of the 55th IEEE International Midwest Symposium on Circuits and Systems, 2012