Pey-Chang Kent Lin
According to our database1,
Pey-Chang Kent Lin
authored at least 10 papers
between 2010 and 2015.
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Bibliography
2015
Efficient Transistor-Level Symbolic Timing Simulation Using Cached Partial Circuit States.
Proceedings of the IEEE/ACM International Conference on Computer-Aided Design, 2015
2013
Proceedings of the 2013 IEEE 31st International Conference on Computer Design, 2013
2012
Timing aware partitioning for multi-FPGA based logic simulation using top-down selective hierarchy flattening.
Proceedings of the 30th International IEEE Conference on Computer Design, 2012
Proceedings of the Proceedings 2012 IEEE International Workshop on Genomic Signal Processing and Statistics, 2012
Proceedings of the 49th Annual Design Automation Conference 2012, 2012
Proceedings of the 49th Annual Design Automation Conference 2012, 2012
2011
Proceedings of the IEEE 29th International Conference on Computer Design, 2011
Proceedings of the 2011 IEEE International Workshop on Genomic Signal Processing and Statistics, 2011
2010
VLSI implementation of a non-linear feedback shift register for high-speed cryptography applications.
Proceedings of the 20th ACM Great Lakes Symposium on VLSI 2009, 2010
Proceedings of the 2010 IEEE International Workshop on Genomic Signal Processing and Statistics, 2010