Peter Rounce

According to our database1, Peter Rounce authored at least 12 papers between 1990 and 2008.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

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Links

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Bibliography

2008
Dynamic Instruction Scheduling in a Trace-based Multi-threaded Architecture.
Int. J. Parallel Program., 2008

Hardware Supported Synchronization Primitives for Clusters.
Proceedings of the International Conference on Parallel and Distributed Processing Techniques and Applications, 2008

2006
The mDTSVLIW: a Multi-Threaded Trace-based VLIW Architecture.
Proceedings of the 18th Symposium on Computer Architecture and High Performance Computing (SBAC-PAD 2006), 2006

2000
Dynamically Scheduling VLIW Instructions.
J. Parallel Distributed Comput., 2000

On the Scheduling Algorithm of the Dynamically Trace Scheduled VLIW Architecture.
Proceedings of the 14th International Parallel & Distributed Processing Symposium (IPDPS'00), 2000

1999
Dynamically Scheduling the Trace Produced During Program Execution into VLIW Instructions.
Proceedings of the 13th International Parallel Processing Symposium / 10th Symposium on Parallel and Distributed Processing (IPPS / SPDP '99), 1999

Effect of Multicycle Intructions on the Integer Performance of the Dynamixcally Trace Scheduled VLIW Architecture.
Proceedings of the High-Performance Computing and Networking, 7th International Conference, 1999

1998
Dynamically Trace Scheduled VLIW Architectures.
Proceedings of the High-Performance Computing and Networking, 1998

1994
Using databases to support the development of microcode.
Microprocess. Microsystems, 1994

1993
'Slick Systems' and 'Happy Hackers': experience with group projects at UCL.
Softw. Eng. J., 1993

An Architecture for Implementing Control and Signal Processing Neural Networks.
Proceedings of the New Trends in Neural Computation, 1993

1990
Architectures within the ESPRIT SPAN project.
IEEE Micro, 1990


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