Peter R. Nuth

According to our database1, Peter R. Nuth authored at least 10 papers between 1989 and 2011.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

Legend:

Book 
In proceedings 
Article 
PhD thesis 
Dataset
Other 

Links

On csauthors.net:

Bibliography

2011
The world's fastest DSP core: Breaking the 100 GMAC/s barrier.
Proceedings of the 2011 IEEE Hot Chips 23 Symposium (HCS), 2011

2009
A DSP architecture optimized for wireless baseband.
Proceedings of the 2008 IEEE International Symposium on System-on-Chip, 2009

1998
Retrospective: the J-machine.
Proceedings of the 25 Years of the International Symposia on Computer Architecture (Selected Papers)., 1998

1995
The Named-State Register File: Implementation and Performance.
Proceedings of the 1st IEEE Symposium on High-Performance Computer Architecture (HPCA 1995), 1995

1994
Named State and Efficient Context Switching.
Proceedings of the Multithreaded Computer Architecture, 1994

1992
The message-driven processor: a multicomputer processing node with efficient mechanisms.
IEEE Micro, 1992

The J-Machine Network.
Proceedings of the Proceedings 1992 IEEE International Conference on Computer Design: VLSI in Computer & Processors, 1992

The Message Driven Processor: An Integrated Multicomputer Processing Element.
Proceedings of the Proceedings 1992 IEEE International Conference on Computer Design: VLSI in Computer & Processors, 1992

1991
A Mechanism for Efficient Context Switching.
Proceedings of the Proceedings 1991 IEEE International Conference on Computer Design: VLSI in Computer & Processors, 1991

1989
The J-Machine: A Fine-Gain Concurrent Computer.
Proceedings of the Information Processing 89, Proceedings of the IFIP 11th World Computer Congress, San Francisco, USA, August 28, 1989


  Loading...