Peter M. Kogge

Keith D. Underwood

Proceedings of the 2006 IEEE International Conference on Cluster Computing, 2006

2005

Polygonal path simplification with angle constraints.

[BibT_eX]

[DOI]

Comput. Geom., 2005

Generation of permutations for SIMD processors.

[BibT_eX]

[DOI]

Alexei Kudriavtsev

Proceedings of the 2005 ACM SIGPLAN/SIGBED Conference on Languages, 2005

The implications of working set analysis on supercomputing memory hierarchy design.

[BibT_eX]

[DOI]

Proceedings of the 19th Annual International Conference on Supercomputing, 2005

Reversible computation with quantum-dot cellular automata (QCA).

[BibT_eX]

[DOI]

Craig S. Lent

Sarah E. Frost

Proceedings of the Second Conference on Computing Frontiers, 2005

2004

A low cost, multithreaded processing-in-memory system.

[BibT_eX]

[DOI]

Proceedings of the 3rd Workshop on Memory Performance Issues, 2004

The "4-Diamond Circuit" - A Minimally Complex Nano-Scale Computational Building Block in QCA.

[BibT_eX]

[DOI]

Proceedings of the 2004 IEEE Computer Society Annual Symposium on VLSI (ISVLSI 2004), 2004

Cache implications of aggressively pipelined high performance microprocessors.

[BibT_eX]

[DOI]

Proceedings of the 2004 IEEE International Symposium on Performance Analysis of Systems and Software, 2004

Characterizing a new class of threads in scientific applications for high end supercomputers.

[BibT_eX]

[DOI]

Proceedings of the 18th Annual International Conference on Supercomputing, 2004

Using Circuits and Systems-Level Research to Drive Nanotechnology.

[BibT_eX]

[DOI]

Ramprasad Ravichandran

Proceedings of the 22nd IEEE International Conference on Computer Design: VLSI in Computers & Processors (ICCD 2004), 2004

Quantum-Dot Cellular Automata (QCA) circuit partitioning: problem modeling and solutions.

[BibT_eX]

[DOI]

Proceedings of the 41th Design Automation Conference, 2004

2003

Energy-efficient issue queue design.

[BibT_eX]

[DOI]

IEEE Trans. Very Large Scale Integr. Syst., 2003

From Bits to Chips: A Multidisciplinary Curriculum for Microelectronics System Design Education.

[BibT_eX]

[DOI]

Proceedings of the 2003 International Conference on Microelectronics Systems Education, 2003

Bouncing Threads: Merging a New Execution Model into a Nanotechnology Memory.

[BibT_eX]

[DOI]

Proceedings of the 2003 IEEE Computer Society Annual Symposium on VLSI (ISVLSI 2003), 2003

The State of State.

[BibT_eX]

[DOI]

Proceedings of the Ninth International Symposium on High-Performance Computer Architecture (HPCA'03), 2003

Implications of a PIM Architectural Model for MPI.

[BibT_eX]

[DOI]

Proceedings of the 2003 IEEE International Conference on Cluster Computing (CLUSTER 2003), 2003

2002

Teaching students computer architecture for new, nanotechnologies.

[BibT_eX]

[DOI]

Michael Thaddeus Niemier

Proceedings of the 2002 workshop on Computer architecture education, 2002

2001

Inherently Lower-Power High-Performance Superscalar Architectures.

[BibT_eX]

[DOI]

IEEE Trans. Computers, 2001

Problems in designing with QCAs: Layout = Timing.

[BibT_eX]

[DOI]

Int. J. Circuit Theory Appl., 2001

Polygonal path approximation with angle constraints.

[BibT_eX]

[DOI]

Proceedings of the Twelfth Annual Symposium on Discrete Algorithms, 2001

Petaflop Computing for Protein Folding.

[BibT_eX]

Proceedings of the Tenth SIAM Conference on Parallel Processing for Scientific Computing, 2001

Energy: efficient instruction dispatch buffer design for superscalar processors.

[BibT_eX]

[DOI]

Proceedings of the 2001 International Symposium on Low Power Electronics and Design, 2001

Exploring and exploiting wire-level pipelining in emerging technologies.

[BibT_eX]

[DOI]

Proceedings of the 28th Annual International Symposium on Computer Architecture, 2001

A Microserver View of HTMT.

[BibT_eX]

[DOI]

Proceedings of the 15th International Parallel & Distributed Processing Symposium (IPDPS-01), 2001

2000

Optimization of high-performance superscalar architectures for energy efficiency.

[BibT_eX]

[DOI]

Proceedings of the 2000 International Symposium on Low Power Electronics and Design, 2000

The Characterization of Data Intensive Memory Workloads on Distributed PIM Systems.

[BibT_eX]

[DOI]

Richard C. Murphy

Arun Rodrigues

Proceedings of the Intelligent Memory Systems, Second International Workshop, 2000

A design of and design tools for a novel quantum dot based microprocessor.

[BibT_eX]

[DOI]

Michael J. Kontz

Proceedings of the 37th Conference on Design Automation, 2000

1999

Application of STD to latch-power estimation.

[BibT_eX]

[DOI]

IEEE Trans. Very Large Scale Integr. Syst., 1999

Accelerating object-oriented applications using method lookup caches and register windowing.

[BibT_eX]

[DOI]

Kanad Ghose

Kiran Raghavendra Desai

J. Syst. Archit., 1999

Mapping Irregular Applications to DIVA, a PIM-based Data-Intensive Architecture.

[BibT_eX]

[DOI]

Proceedings of the ACM/IEEE Conference on Supercomputing, 1999

Microservers: a new memory semantics for massively parallel computing.

[BibT_eX]

[DOI]

Proceedings of the 13th international conference on Supercomputing, 1999

Logic in wire: using quantum dots to implement a microprocessor.

[BibT_eX]

[DOI]

Proceedings of the 6th IEEE International Conference on Electronics, Circuits and Systems, 1999

Prototyping Execution Models for HTMT Petaflop Machine in Java.

[BibT_eX]

[DOI]

Lilia Yerosheva

Proceedings of the Network-Based Parallel Computing: Communication, 1999

1998

The energy complexity of register files.

[BibT_eX]

[DOI]

Proceedings of the 1998 International Symposium on Low Power Electronics and Design, 1998

Optimizing Data Scheduling on Processor-in-Memory Arrays.

[BibT_eX]

[DOI]

Yi Tian

Edwin Hsing-Mean Sha

Chantana Chantrapornchai