Peter Gutberlet

According to our database1, Peter Gutberlet authored at least 9 papers between 1990 and 2004.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of four.

Timeline

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Links

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Bibliography

2004
Fast Bit-Accurate C++ Datatypes For Functional System Verification and Synthesis.
Proceedings of the Forum on specification and Design Languages, 2004

1997
Spezifikation und Synthese aus taktfreien VHDL Verhaltensbeschreibungen.
PhD thesis, 1997

1996
Automatic generation of interprocess communication in the PARAGON system.
Proceedings of the Seventh IEEE International Workshop on Rapid System Prototyping (RSP '96), 1996

1994
Specification of interface components for synchronous data paths.
Proceedings of the 7th International Symposium on High Level Synthesis, 1994

Timing preserving interface transformations for the synthesis of behavioral VHDL.
Proceedings of the Proceedings EURO-DAC'94, 1994

1993
Interface specification and synthesis for VHDL processes.
Proceedings of the European Design Automation Conference 1993, 1993

1992
Automatic module allocation in high level synthesis.
Proceedings of the conference on European design automation, 1992

1991
CASCH: a scheduling algorithm for "high level"-synthesis.
Proceedings of the conference on European design automation, 1991

1990
CASCH - ein Scheduling-Algorithmus für "High-Level"-Synthese.
Proceedings of the Rechnergestützter Entwurf und Architektur mikroelektronischer Systeme, 1990


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