Peter Bendix

According to our database, Peter Bendix authored at least 13 papers between 2001 and 2005.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of five.

2005

ESD-Induced Internal Core Device Failure: New Failure Modes in System-on-Chip (SoC) Designs, invited.

Yoon Huh, Peter Bendix, Kyungjin Min, Jau-Wen Chen, Ravindra Narayan, Larry D. Johnson, Steven H. Voldman

Proceedings of the 5th IEEE International Workshop on System-on-Chip for Real-Time Applications (IWSOC 2005), 2005

2004

Design of ESD power protection with diode structures for mixed-power supply systems.

Jaesik Lee, Yoonjong Huh, Peter Bendix, Sung-Mo Kang

IEEE J. Solid State Circuits, 2004

Prediction of interconnect adjacency distribution: derivation, validation, and applications.

Payman Zarkesh-Ha, Ken Doniger, William Loh, Peter Bendix

Proceedings of the Sixth International Workshop on System-Level Interconnect Prediction (SLIP 2004), 2004

Advanced compact models: gateway to modern CMOS design.

Gennady Gildenblat, Colin C. McAndrew, Hailing Wang, Weimin Wu, Daniel Foty, Laurent Lemaitre, Peter Bendix

Proceedings of the 2004 11th IEEE International Conference on Electronics, 2004

Practical aspects of MOS transistor model "accuracy" in modern CMOS technology.

Peter Bendix, Daniel Foty, David Pachura

Proceedings of the 2004 11th IEEE International Conference on Electronics, 2004

RF distortion analysis with compact MOSFET models.

Peter Bendix, Pat Rakers, P. Wagh, Laurent Lemaitre, Wladek Grabinski, Colin C. McAndrew, Xin Gu, Gennady Gildenblat

Proceedings of the IEEE 2004 Custom Integrated Circuits Conference, 2004

2003

Chip-level charged-device modeling and simulation in CMOS integrated circuits.

Jaesik Lee, Ki-Wook Kim, Yoonjong Huh, Peter Bendix, Sung-Mo Kang

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2003

A Sum-over-Paths Impulse-Response Moment-Extraction Algorithm for IC-Interconnect Networks: Verification, Coupled RC Lines.

Yannick L. Le Coz, Dhivya Krishna, Dusan M. Petranovic, William M. Loh, Peter Bendix

Proceedings of the 2003 International Conference on Computer-Aided Design, 2003

2001

Spice Model Quality: Process Development Viewpoint.

Peter Bendix

Proceedings of the 2nd International Symposium on Quality of Electronic Design (ISQED 2001), 2001

Full chip ESD design rule checking.

Q. Li, Yoonjong Huh, Jau-Wen Chen, Peter Bendix, Sung-Mo Kang

Proceedings of the 2001 International Symposium on Circuits and Systems, 2001

ESD design rule checker.

Q. Li, Yoonjong Huh, Jau-Wen Chen, Peter Bendix, Sung-Mo Kang

Proceedings of the 2001 International Symposium on Circuits and Systems, 2001

Design-for-ESD-reliability for high-frequency I/O interface circuits in deep-submicron CMOS technology.

Jaesik Lee, Yoonjong Huh, Peter Bendix, Sung-Mo Kang

Proceedings of the 2001 International Symposium on Circuits and Systems, 2001

Understanding and Addressing the Noise Induced By Electrostatic Discharge in Multiple Power Supply Systems.

Jaesik Lee, Yoonjong Huh, Peter Bendix, Sung-Mo Kang

Proceedings of the 19th International Conference on Computer Design (ICCD 2001), 2001