Pepijn J. de Langen

According to our database, Pepijn J. de Langen authored at least 7 papers between 2004 and 2009.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of four.

2009

Leakage-Aware Multiprocessor Scheduling.

Pepijn J. de Langen, Ben H. H. Juurlink

J. Signal Process. Syst., 2009

Limiting the number of dirty cache lines.

Pepijn J. de Langen, Ben H. H. Juurlink

Proceedings of the Design, Automation and Test in Europe, 2009

2008

Memory copies in multi-level memory systems.

Pepijn J. de Langen, Ben H. H. Juurlink

Proceedings of the 19th IEEE International Conference on Application-Specific Systems, 2008

2007

Trade-Offs Between Voltage Scaling and Processor Shutdown for Low-Energy Embedded Multiprocessors.

Pepijn J. de Langen, Ben H. H. Juurlink

Proceedings of the Embedded Computer Systems: Architectures, 2007

2006

Leakage-aware multiprocessor scheduling for low power.

Pepijn J. de Langen, Ben H. H. Juurlink

Proceedings of the 20th International Parallel and Distributed Processing Symposium (IPDPS 2006), 2006

2004

Reducing traffic generated by conflict misses in caches.

Pepijn J. de Langen, Ben H. H. Juurlink

Proceedings of the First Conference on Computing Frontiers, 2004

Dynamic techniques to reduce memory traffic in embedded systems.

Ben H. H. Juurlink, Pepijn J. de Langen

Proceedings of the First Conference on Computing Frontiers, 2004