Pengzhou He

Orcid: 0000-0003-3461-4548

According to our database1, Pengzhou He authored at least 27 papers between 2021 and 2024.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

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Bibliography

2024
AEKA: FPGA Implementation of Area-Efficient Karatsuba Accelerator for Ring-Binary-LWE-Based Lightweight PQC.
ACM Trans. Reconfigurable Technol. Syst., June, 2024

TINA: TMVP-Initiated Novel Accelerator for Lightweight Ring-LWE-Based PQC.
IEEE Trans. Very Large Scale Integr. Syst., May, 2024

CASA: A Compact and Scalable Accelerator for Approximate Homomorphic Encryption.
IACR Trans. Cryptogr. Hardw. Embed. Syst., 2024

HELP: Highly Efficient and Low-Latency Hardware Accelerator for Integer Polynomial Multiplication.
Proceedings of the IEEE Computer Society Annual Symposium on VLSI, 2024

LAMP: Efficient Implementation of Lightweight Accelerator for Polynomial MultiPlication, From Falcon to RBLWE-ENC.
Proceedings of the Great Lakes Symposium on VLSI 2024, 2024

2023
KINA: Karatsuba Initiated Novel Accelerator for Ring-Binary-LWE (RBLWE)-Based Post-Quantum Cryptography.
IEEE Trans. Very Large Scale Integr. Syst., October, 2023

FPGA Implementation of Compact Hardware Accelerators for Ring-Binary-LWE-based Post-quantum Cryptography.
ACM Trans. Reconfigurable Technol. Syst., September, 2023

LEAP: Lightweight and Efficient Accelerator for Sparse Polynomial Multiplication of HQC.
IEEE Trans. Very Large Scale Integr. Syst., June, 2023

COPMA: Compact and Optimized Polynomial Multiplier Accelerator for High-Performance Implementation of LWR-Based PQC.
IEEE Trans. Very Large Scale Integr. Syst., April, 2023

Efficient Hardware RNS Decomposition for Post-Quantum Signature Scheme FALCON.
IACR Cryptol. ePrint Arch., 2023

Hardware-Implemented Lightweight Accelerator for Large Integer Polynomial Multiplication.
IEEE Comput. Archit. Lett., 2023

Novel Implementation of High-Performance Polynomial Multiplication for Unified KEM Saber based on TMVP Design Strategy.
Proceedings of the 24th International Symposium on Quality Electronic Design, 2023

LOCS: LOw-Latency and ConStant-Timing Implementation of Fixed-Weight Sampler for HQC.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2023

Efficient Implementation of Ring-Binary-LWE-based Lightweight PQC Accelerator on the FPGA Platform.
Proceedings of the 31st IEEE Annual International Symposium on Field-Programmable Custom Computing Machines, 2023

2022
Efficient Hardware Implementation of Finite Field Arithmetic $AB+C$AB+C for Binary Ring-LWE Based Post-Quantum Cryptography.
IEEE Trans. Emerg. Top. Comput., 2022

Efficient Hardware Arithmetic for Inverted Binary Ring-LWE Based Post-Quantum Cryptography.
IEEE Trans. Circuits Syst. I Regul. Pap., 2022

High-Performance Polynomial Multiplication Hardware Accelerators for KEM Saber and NTRU.
IACR Cryptol. ePrint Arch., 2022

Lightweight Hardware Implementation of Binary Ring-LWE PQC Accelerator.
IEEE Comput. Archit. Lett., 2022

Hardware Implementation of High-Performance Polynomial Multiplication for KEM Saber.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2022

HPMA-Saber: High-Performance Polynomial Multiplication Accelerator for KEM Saber.
Proceedings of the IEEE 40th International Conference on Computer Design, 2022

Systolic Acceleration of Polynomial Multiplication for KEM Saber and Binary Ring-LWE Post-Quantum Cryptography.
Proceedings of the IEEE International Symposium on Hardware Oriented Security and Trust, 2022

Ultra Low-Complexity Implementation of Binary Ring-LWE based Post-Quantum Cryptography on FPGA Platform.
Proceedings of the FPGA '22: The 2022 ACM/SIGDA International Symposium on Field-Programmable Gate Arrays, Virtual Event, USA, 27 February 2022, 2022

HPMA-NTRU: High-Performance Polynomial Multiplication Accelerator for NTRU.
Proceedings of the IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems, 2022

Work-in-Progress: High-Performance Systolic Hardware Accelerator for RBLWE-based Post-Quantum Cryptography.
Proceedings of the International Conference on Hardware/Software Codesign and System Synthesis, 2022

2021
Novel Low-Complexity Polynomial Multiplication Over Hybrid Fields for Efficient Implementation of Binary Ring-LWE Post-Quantum Cryptography.
IEEE J. Emerg. Sel. Topics Circuits Syst., 2021

CROP: FPGA Implementation of High-Performance Polynomial Multiplication in Saber KEM based on Novel Cyclic-Row Oriented Processing Strategy.
Proceedings of the 39th IEEE International Conference on Computer Design, 2021

Efficient Implementation of Finite Field Arithmetic for Binary Ring-LWE Post-Quantum Cryptography Through a Novel Lookup-Table-Like Method.
Proceedings of the 58th ACM/IEEE Design Automation Conference, 2021


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