Peng Yin
Orcid: 0000-0001-5422-653XAffiliations:
- Chongqing University, CQU, School of Microelectronics and Communication Engineering, China
According to our database1,
Peng Yin
authored at least 10 papers
between 2020 and 2024.
Collaborative distances:
Collaborative distances:
Timeline
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on orcid.org
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Bibliography
2024
High Logic Density Cyclic Redundancy Check and Forward Error Correction Logic Sharing Encoding Circuit for JESD204C Controller.
IEEE Trans. Circuits Syst. I Regul. Pap., November, 2024
IEEE Trans. Circuits Syst. I Regul. Pap., June, 2024
Digit. Signal Process., 2024
2023
A High-Logic-Density, Low-Power Control Character Detection and Identification Circuit for the JESD204B Data Link Layer.
IEEE Trans. Circuits Syst. II Express Briefs, April, 2023
2022
A Sub-1/°C Bandgap Voltage Reference With High-Order Temperature Compensation in 0.18-μm CMOS Process.
IEEE Trans. Circuits Syst. I Regul. Pap., 2022
An Automatic Clock-Induced-Spurs Detector Based on Energy Detection for Direct Digital Frequency Synthesizer.
Sensors, 2022
A Low-Area Low-Power Column-parallel Digital Decimation Filter Using 1-Bit Pre-BWI Topology for CMOS Image Sensor in 40-nm CMOS Process.
Circuits Syst. Signal Process., 2022
2021
A Tunable Parameter, High Linearity Time-to-Digital Converter Implemented in 28-nm FPGA.
IEEE Trans. Instrum. Meas., 2021
A Low-Area and Low-Power Comma Detection and Word Alignment Circuits for JESD204B/C Controller.
IEEE Trans. Circuits Syst. I Regul. Pap., 2021
2020
A 5-13.5 Gb/s Multistandard Receiver With High Jitter Tolerance Digital CDR in 40-nm CMOS Process.
IEEE Trans. Circuits Syst., 2020